نتایج جستجو برای: multiplier transformations

تعداد نتایج: 64655  

The purpose of this paper is to design a 64×64 bit low power, low delay and high speed Arithmetic Logic Unit (ALU). Arithmetic Logic Unit performs arithmetic operation like addition, multiplication. Adders play important role in ALU. For designing adder, the combination of carry lookahead adder and carry select adder, also add-one circuit have been used to achieve high speed and low area. In mu...

Journal: :bulletin of the iranian mathematical society 2011
b. mashayekhy a. hokmabadi f. mohammadzadeh

let $g$ be a $p$-group of nilpotency class $k$ with finite exponent $exp(g)$ and let $m=lfloorlog_pk floor$. we show that $exp(m^{(c)}(g))$ divides $exp(g)p^{m(k-1)}$, for all $cgeq1$, where $m^{(c)}(g)$ denotes the c-nilpotent multiplier of $g$. this implies that $exp( m(g))$ divides $exp(g)$, for all finite $p$-groups of class at most $p-1$. moreover, we show that our result is an improvement...

ژورنال: سنجش و ایمنی پرتو 2020

In this study, the detection of alpha particles in the high current mode is investigated in the presence of two gaseous electron multipliers in the micro-pattern structures. Thick Gas Electron Multiplier (TGEM) and an Electron Multiplier Assemblies (EMA) were designed and constructed as amplification gap in the detector chamber. An ion chamber is employed to measure the current of interaction b...

2014
Praveenkumar Reddy S. Praveenkumar Reddy S. Parvathi Nair

This paper presents a high speed binary floating point multiplier based on Hybrid Method. To improve speed multiplication of mantissa is done using Hybrid method replacing existing multipliers like Carry Save Multiplier, Dadda Multiplier and Modified Booth Multiplier. Hybrid method is a combination of Dadda Multiplier and Modified Radix-8 Booth Multiplier. The design achieves high speed with ma...

2011
S. Prem Kumar S. Sivaprakasam

In this paper we proposed a three stage pipelined finite-impulse response (FIR) filter, this FIR filter contains multipliers such as Hybrid multiplier, Booth multiplier algorithm and Array multiplier. In general, multiplication process consists of two parts as multiplicand and multiplier. According to the array multiplier, the numbers of partial products (PP) are equal to the number of bits in ...

Journal: :Documenta Mathematica 2022

Multipliers of reproducing kernel Hilbert spaces can be characterized in terms positivity $n \times n$ matrices analogous to the classical Pick matrix. We study for which it suffices consider bounded size $n$. connect this problem notion subhomogeneity non-selfadjoint operator algebras. Our main results show that multiplier algebras many analytic functions, such as Dirichlet space and Drury-Arv...

Journal: :Journal of Multivariate Analysis 2022

Given a functional central limit (fCLT) for an estimator and parameter transformation, we construct random processes, called delta residuals, which asymptotically have the same covariance structure as process of method. An explicit construction these residuals transformations moment-based estimators multiplier bootstrap fCLT resulting are proven. The latter is used to consistently estimate quan...

An efficient Lookup Table (LUT) design for memory-based multiplier is proposed.  This multiplier can be preferred in DSP computation where one of the inputs, which is filter coefficient to the multiplier, is fixed. In this design, all possible product terms of input multiplicand with the fixed coefficient are stored directly in memory. In contrast to an earlier proposition Odd Multiple Storage ...

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