A programming technique for controlling the floating gates (FG) in ultra low-voltage (ULV) floating-gate circuits is presented. Simple ultra low-voltage floatinggate current scaling and level shifting circuits are discussed. The current scaling and level shifting are accomplished using only minimum sized transistors and floating capacitors. Floating-gate current multiplier and divider circuits ...

In the phase locked loop (PLL) frequency synthesizer which is used in a higher frequency region, the prescaler method is employed in order to increase the operating frequency of the programmable divider. However, since the fixed divider whose division ratio is same as the prescaler is installed at the following stage of the reference divider, the reference frequency is decreased and the perform...

In this paper, the divider circuit for PLL based Frequency Synthesizer has been designed. In the divider circuit, three types of counters have been used namely Prescaler, Main Counter and Swallow Counter. The Divider circuit is a two modulus Divider and it can be used to divide by any value in the range 4635 to 4650 as per the requirement. It uses a two modulus Prescaler and it has two modes of...

This work presents the fastest Current Mode Logic static frequency divider to date. The circuit is fabricated in a commercially available InP process. Microwave techniques are used to achieve speeds of 75 GHz without resort to emitter followers. Interconnect design is stressed and the results of several variations are presented. Microstrip, inverted microstrip, peaking inductors and keep-alive ...

In this paper, an isolation enhanced multiway power divider for wideband beamforming array is proposed. This method is based on the concept which converts the divider into multi-section stepped impedance transformer. In addition to this scheme, lumped inductors and capacitors are incorporated in isolation networks to enhance the isolation bandwidth of the divider. In/Output reflection and isola...

-A lumped element 180 Wilkinson divider consisting of 11 elements was presented in 2003. It used a conventional Wilkinson divider, a -90 and a +90 phase shifter of πand T-type. In this paper, that of 10 elements is newly presented. Frequency characteristics of the two 180 Wilkinson dividers and those of a rat-race divider known as an out of phase circuit are discussed. Key-Words: Wilkinson divi...

This work describes the design of a double-precision radix-8 divider. Low-power techniques are applied in the design of the unit, and energy-delay tradeoffs considered. The energy dissipation in the divider can be reduced by up to 70% with respect to a standard implementation not optimized for energy, without penalizing the latency. The radix-8 divider is compared with one obtained by overlappi...

A high accurate and low-voltage analog CMOS current divider which operates with a single power supply voltage is designed in 0.18µm CMOS standard technology. The proposed divider uses a differential amplifier and transistor in triode region in order to perform the division. The proposed divider is modeled with neural network while TLBO algorithm is used to optimize it. The proposed optimiza...

A high accurate and low-voltage analog CMOS current divider which operates with a single power supply voltage is designed in 0.18µm CMOS standard technology. The proposed divider uses a differential amplifier and transistor in triode region in order to perform the division. The proposed divider is modeled with neural network while TLBO algorithm is used to optimize it. The proposed optimiza...