The evolving vision of the Internet-of-Things (IoT) will revolutionize various applications such as remote health monitoring, home automation and remote surveillance. It has been projected that by 2025, there will be 1 trillion IoT devices influencing our daily lives. This will result in the generation of an enormous amount of data, which will have to be stored, processed and transmitted effici...

The applications related to ultra-low power wearables like internet of things, robotics, intrusion detection, and image security have become a major computing paradigm the latest disruptive technology after artificial intelligence. Ability connect with other systems from low high level has prompted unprecedented array in all fields human activity science, engineering, health, leisure everyday l...

This paper describes the application of a measurement based power analysis technique for an embedded DSP processor. An instruction-level power model for the processor has been developed using this technique. Sig-niicant points of diierence have been observed between this model and the ones developed earlier for some general-purpose commercial microprocessors 1, 2]. In particular, the eeect of c...

Nowadays, extensive research has been conducted for gas turbine engines control due to growing importance of gas turbine engines for different industries and the need to design a suitable control system for a gas turbine as the heart of the industry. In order to design gas turbine control system, various control variables can be used, but in the meantime, fuel flow inserting into combustion cha...

In this paper, a new hybrid routing protocol is presented for low power Wireless Sensor Networks (WSNs). The new system uses an integrated piezoelectric energy harvester to increase the network lifetime. Power dissipation is one of the most important factors affecting lifetime of a WSN. An innovative cluster head selection technique using Cuckoo optimization algorithm has been used in the desig...

A fast low-power 1-bit full adder circuit suitable for nano-scale CMOS implementation is presented. Out of the three modules in a common full-adder circuit, we have replaced one with a new design, and optimized another one, all with the goal to reduce the static power consumption. The design has been simulated and evaluated using the 65 nm PTM models.