This paper presents the design and simulation of a 2.4 GHz ISM band front end single stage Low Noise Amplifier (LNA) for wireless transceiver system. This amplifier uses AVAGO ATF-54143 transistor which is a low noise and high dynamic range Pseudomorphic high electron mobility transistor. The proposed method is addressed to optimize noise performance and power efficient while maintaining good i...

The main focus of this paper is to design a “Low noise amplifier” for radio frequency applications using MOS 180nm technology. In modern RF electronics, we rarely design an LNA in isolation. Rather, we view and design the RF chain as one entity, performing many iterations among the stages. A low power MOS low noise amplifier (LNA) working at 2.4GHz for ZigBee communication is presented in this ...

This paper presents a current re-use quadrature front end receiver architecture for ISM Band. The proposed architecture is a stacked QLMV cell which consists of a low-noise amplifier (LNA), mixer and voltage-controlled oscillator (VCO), which feeds into the intermediate frequency (IF) load. The LNA is a common source amplifier with Ls source degeneration, a double-balanced Gilbert cell mixer an...

A broadband input matching technique for low noise amplifiers (LNAs) is presented which exploits an active feedback network to achieve better noise performance. The presented matching scheme is compared to the common-gate and conventional noise canceling structures. The noise performance of the presented technique is similar to that of the conventional noise canceling technique with much less p...

In this paper, a new design of concurrent dual-band Low Noise Amplifier (LNA) for multi-band single-channel Global Navigation Satellite System (GNSS) receivers is proposed. This new structure is able to operate concurrently at frequency of 1.2 and 1.57 GHz. Parallel and series resonance parts are employed in the input matching in order to achieve concurrent performance. With respect to used pse...

This paper reports an area-efficient LNA design using an active inductor which can be realised in various UHF band receivers. The overall low noise performance of LNA is achieved by cancelling the inductor noise through additional feed forward path. This circuit is implemented using 0.18μm CMOS technology with cadence environment and its operating range is 0.4 to 1GHz. Design is simulated in vi...

In this paper, a low-power adaptive low noise amplifier (LNA) is presented. The LNA is based on a bipolar cascode topology, uses inductive source degeneration and emitter area scaling to achieve noise and input-impedance matching simultaneously. The input impedance and the noise factor were simulated as function of the bias collector current and the results show that both are approximately cons...

Alternative wide band Low-Noise Amplifier (LNA) topologies to be used for highly integrated CMOS transceivers are investigated. A methodology that systematically generates all the LNA topology options with 2 Voltage Controlled Current Sources (VCCS) is presented. Next to wellknown circuits such as the common gate stage and shunt series feedback common source stage, 2 alternative LNA topology ar...

In present day society where communication technologies are advancing at spiral rate, the need for efficient integrated circuit design to transmit and receive signals at unlicensed frequency spectrum is inevitable. This study tries to shed new light on the latter topic by evaluating the issues associated with the design in advanced CMOS technologies of a critical RF building block, namely a sin...

In this paper, the significance of linearity for UWB front-end circuit is discussed. The effects of strong narrow band interferer on UWB signal are investigated. Wideband linearization techniques for UWB LNA are first proposed in this work. A high linearity UWB LNA is designed in TSMC 0.18μ CMOS process The simulation results show that the designed LNA exhibits very high IIP3 (6.9~13.8 dBm) whi...