A low power 22-mW 900MHz Frequency Synthesizer (FS), with an on-chip LC-tuned voltage controlled oscillator (VCO) for GSM applications is presented. The synthesizer possesses several novel features that include a completely integrated structure, a low phase noise on-chip LC VCO, a low-power Dual-Modulus Divider (DMD) in CML topology, a compensated charge pump with balanced switching, an on-chip...

This thesis presents a backgate coupled QVCO with current reused structure, and complementary cross-coupled differential Colpitts VCO and QVCO. The formally proposed QVCO not only dissipates significantly lower power but also improves 1/ƒ close-in phase noise, compared to the conventional QVCO. For verification of the suggested idea, the proposed QVCO designed for 2 GHz operation based on a 0.1...

The nonlinear distortion of frequency or phase modulation systems composed by a voltage-controlled oscillator (VCO) modulator and a phase-locked loop (PLL) discriminator is addressed. Volterra series nonlinear transfer functions up to third order, for an LC Colpitts type modulator and a PLL with simultaneous nonlinear phase-detector and VCO, are combined as a cascade of mildly nonlinear systems...

This paper presents a study of Active inductor based VCOs that helps in increasing the tuning range of the VCO , reduces the chip size and phase noise of the circuit. Study has been done on LC VCOs by replacing the passive inductors with the active one consisting of MOSFET. Design of circuit has been done on Orcade Capture using .18um technology.power consumption of circuit is 1.33mW with tunin...

This paper presents a fully integrated 20-GHz frequency synthesizer based on an integer-N fourth-order type-II phase-locked loop (PLL). The PLL synthesizer employing a cross-coupled LC VCO was fabricated in a 0.13-μm SiGe:C BiCMOS process with a small chip area of 0.48 mm. The VCO core current is 4 mA. The full tuning range of the VCO is 2.21 GHz from 19.9 to 22.11 GHz, and the PLL can synthesi...

This paper presents a four-core LC-VCO array in 55 nm CMOS technology. Based on the multi-core VCO technology and switched capacitor technology, tuning range is expanded, phase noise optimization wide achieved based second harmonic filtering Q value degeneration as well of switching transistors. The proposed array, occupying chip area 1.65 × 1.44 mm2, realizes measured oscillation frequency abo...