We report herein a set of deoxyribozyme-based logic gates capable of generating any Boolean function. We construct basic NOT and AND gates, followed by the more complex XOR gate. These gates were constructed through a modular design that combines molecular beacon stem-loops with hammerhead-type deoxyribozymes. Importantly, as the gates have oligonucleotides as both inputs and output, they open ...

This paper describes the architecture, design & implementation of 2 bit ternary ALU (T-ALU) slice. The proposed ALU is designed for two-bit operation & can be used for n bit operations by cascading n/2 ALU slices. This ALU is implemented using C-MOS ternary logic gates (T-Gates) for ternary arithmetic & logic circuits. Ternary gates are implemented using enhancement / depletion MOSFET technolog...

This paper describes various techniques to reduce the number of logic gates needed to implement the DES S-boxes in bitslice software. Using standard logic gates, an average of 56 gates per S-box was achieved, while an average of 51 was produced when non-standard gates were utilized. This is an improvement over the previous best result, which used an average of 61 non-standard gates.

We give the optimal decomposition of a universal two-qubit circuit using Heisenberg exchange interactions and single qubit rotations. Tuning the strength and duration of the Heisenberg exchange allows one to implement SWAP gates. Our optimal circuit is constructed from only three SWAP gates and six single qubit gates. We show that three SWAP gates are not only sufficient, but necessary. Since s...

The controlled-not gate and the single qubit gates are considered elementary gates in quantum computing. It is natural to ask how many such elementary gates are needed to implement more elaborate gates or circuits. Recall that a controlled-U gate can be realized with two controlled-not gates and four single qubit gates. We prove that this implementation is optimal if and only if the matrix U sa...

Unitary operations are expressed in the quantum circuit model as a finite sequence of elementary gates, such as controlled-not gates and single qubit gates. We prove that the simplified Toffoli gate by Margolus, which coincides with the Toffoli gate up to a single change of sign, cannot be realized with less than three controlled-not gates. If the circuit is implemented with three controlled-no...

Accurate delay calculation of circuit gates is very important in timing analysis of digital circuits. Waveform shapes on the input ports of logic gates should be considered, in the characterization phase of delay calculation, to obtain accurate gate delay values. Glitches and their temporal effect on circuit gate delays should be taken into account for this purpose. However, the explosive numbe...

Digital systems are said to be constructed using basic logic gates. These gates are the NOR, NAND, AND, OR, EXOR & EXNOR gates. This paper presents a robust three transistors (3T) based NAND and NOR gates with precise output logic levels, yet maintaining equivalent performance than the existing logic structures. This new set of 3T logic gates are based on CMOS inverter and Pass Transistor Logic...

We show that a set of gates that consists of all one-bit quantum gates (U(2)) and the two-bit exclusive-or gate (that maps Boolean values (x; y) to (x; xy)) is universal in the sense that all unitary operations on arbitrarily many bits n (U(2 n)) can be expressed as compositions of these gates. We investigate the number of the above gates required to implement other gates, such as generalized D...

This paper investigates the relationship between a single-electron gate probability of failure and the random variations affecting its elements. The study focuses on digital logic gates and circuits. Two major implementations are considered: static complementary logic gates and threshold logic gates (TLG). In addition to implementation, the effect of the gate fan-in on the reliability is invest...