In recent research, we proposed a general framework of quantum-inspired multi-objective evolutionary algorithms(QMOEA) and gave one of its sufficient convergence conditions to Pareto optimal set. In this paper, two Q-gate operators, H2 gate and R&N2 gate, are experimentally validated as two Q-gate paradigms meeting to the convergence condition. The former is a modified rotation gate, and the la...

Despite the simplicity of the hexagonal graphene structure formed by carbon atoms, the electronic behavior shows fascinating properties, giving high expectation for the possible applications of graphene in the field. The Graphene Nano-Ribbon Field Effect Transistor (GNRFET) is an emerging technology that received much attention in recent years. In this paper, we investigate the device performan...

The dependence of the metal gate work function on the underlying gate dielectric in advanced metal-oxide-semiconductor ~MOS! gate stacks was explored. Metal work functions on high-k dielectrics are observed to differ appreciably from their values on SiO2 or in vacuum. We applied the interface dipole theory to the interface between the gate and the gate dielectric of a MOS transistor and obtaine...

In this work, we studied the gate breakdown mechanisms of p-GaN AlGaN/GaN HEMTs by a novel multiple-gate-sweep-based method. For first time, three different were observed and identified separately in same devices: metal/p-GaN junction breakdown, p-GaN/AlGaN/GaN passivation related breakdown. This method is an effective to determine mechanisms. The BD further confirmed scanning electron microsco...

As the gate oxide thickness decreases below 2 nm, the gate leakage current increases dramatically due to direct tunneling current. This large gate leakage current will be an obstacle to reducing gate oxide thickness for the high speed operation of future devices. A MOS transistor with Ta2O5 gate dielectric is fabricated and characterized as a possible replacement for MOS transistors with ultra-...

Page I. Gate Drive Requirements ................................................................................1 I. A Impact of the impedance of the gate drive circuit on switching losses............1 I. B Impact of the gate drive impedance on noise sensitivity.................................2 I. C Impact of gate drive impedance on "dynamic latching" ..................................2 I. D U...

Gate depletion and boron penetration through thin gate oxide place directly opposing requirements on the gate engineering for advanced MOSFET’s. In this paper, several important issues of deep-submicron CMOS transistor gate engineering are discussed. First, the impact of gate nitrogen implantation on the performance and reliability of deep-submicron CMOSFET’s is investigated. The suppression of...

With submicron technologies, gate delays are dominated by gate load delays rather than intrinsic gate delays. While the common approach for computing gate load delay (or total gate delay) is through delay tables (or k-factor equations), there are important methodology problems associated with the delay table approach. In this paper, we propose a gate driver model with a Thevenin equivalent circ...

Analysis of the electrostatic characteristics and the gate capacitance of typical nanostructured carbon nanotube field effect transistors (CNTFETs) were performed numerically. A previously developed parallelized electrostatic Poisson’s equation solver (PPES) is employed, coupled with a parallel adaptive mesh refinement (PAMR) to improve the numerical accuracy near the region where variation of ...