A wide-range differential difference operational floating amplifier (DDOFA) is introduced. The DDOFA is a new block useful for continuous-time analog signal processing. The DDOFA is realized using a differential difference transconductor with large signal handling capability and a single input differential output current op-amp. The DDOFA forces two differential voltages to the same value and p...

A novel four-quadrant analog multiplier using floating gate MOS (FGMOS) transistors operating in the saturation region is presented. The drain current is proportional to the square of the weighted sum of the input signals. This square law characteristic of the FGMOS transistor is used to implement the quarter square identity by utilizing only six FGMOS transistors. The main features of this rem...

In this paper, we report on the electrical properties of metal–oxide–semiconductor (MOS) capacitors containing a well-confined 8 nm-thick SiGe amorphous layer (a-SiGe) embedded in a SiO2 matrix grown by RF magnetron sputtering at a low temperature (350 ◦C). Capacitance–voltage measurements show that the introduction of the SiGe layer leads to a significant enhancement of the charge trapping cap...

In this paper floating gate MOS (FGMOS) along with sleep transistor technique and leakage control transistor (LECTOR) technique has been used to design low power SRAM cell. Detailed investigation on operation, analysis and result comparison of conventional 6T, FGSRAM, FGSLEEPY, FGLECTOR and FGSLEEPY LECTOR has been done. All the simulations are done in Cadence Virtuoso environment on 45 nm stan...

This paper is an in-depth review on silicon implementations of threshold logic gates that covers several decades. In this paper, we will mention early MOS threshold logic solutions and detail numerous very-large-scale integration (VLSI) implementations including capacitive (switched capacitor and floating gate with their variations), conductance/current (pseudo-nMOS and output-wired-inverters, ...

An original implementation in CMOS technology of the exponential function will be presented. In order to improve the circuit frequency response, only MOS transistors working in saturation are used and a current-mode operation is chosen. The compatibility to VLSI designed is achieved by using a FGMOS (Floating-Gate MOS) transistor for reducing the circuit complexity. The approximation error caus...

This paper will present work on a recharged comparator using Semi Floating-Gate (SFG) MOS devices. The output voltage of a basic SFG MOS Comparator circuit is normally interleaved with a recharge voltage. This prohibit control of passgates, which requires binary control signals. An output buffer is introduced to allow the control of pass-gates and multiplexers (MUXs) beyond a single recharge cl...

A programming technique for controlling the floating gates (FG) in ultra low-voltage (ULV) floating-gate circuits is presented. Simple ultra low-voltage floatinggate current scaling and level shifting circuits are discussed. The current scaling and level shifting are accomplished using only minimum sized transistors and floating capacitors. Floating-gate current multiplier and divider circuits ...

We discuss the possibility of developing high-quality oating-gate memories and circuits in digital CMOS technologies that have only one layer of polysilicon. Here, the primary concern is whether or not we can get adequate control-gate linearity from MOS capacitors. We employ two experimental proceedures to address this issue and nd acceptable oating-gate circuit behavior with MOS capacitors. Fi...

To reduce power consumption in electronic designs, new techniques for circuit design must always be considered. Floating-gate MOS (FGMOS) is one of those techniques and has previously shown potentially better performance than standard static CMOS circuits for ultra-low power designs. One reason for this is because FGMOS only requires a few transistors per gate and still retain a large fan-in. A...