نتایج جستجو برای: dual material gate
تعداد نتایج: 556549 فیلتر نتایج به سال:
Article history: Received 25 May 2015 Received in revised form 20 June 2015 Accepted 6 July 2015 Available online xxxx
The upcoming trend in VLSI technology has led to the miniaturization of semiconductor devices which in turn is strongly dependent on the advancement in the CMOS technology. The present technology is below sub-100 nm in channel length which is the minimum dimension of single device. As CMOS technology dimensions are being intrusively scaled down to the fundamental limits such as reduction in car...
In sub-65nm CMOS technology, switching power and gate as well as subthreshold leakage power are the major components of total power dissipation. To achieve power-performance tradeoffs one varies different process (Tox, K, Vth,) and design parameters (VDD, W). Techniques for (i) dual-K and dual-Tox have been proposed to reduce gate leakage, (ii) dual (multiple)-Vth has been introduced to minimiz...
We report on the fabrication of coplanar dual-gate ZnO thin-film transistors with 200-nm thickness SiNx for both top and bottom dielectrics. The ZnO film was deposited by RF magnetron sputtering on SiO2/Si substrates at 100◦C. And the thickness of ZnO film is compared with 100-nm and 40-nm. This TFT has a channel width of 100-μm and channel length of 5-μm. The fabricated coplanar dual-gate ZnO ...
Limited energy consumption in multimedia requires very low power circuits. In this paper we focused on leakage current minimization in single static random access memory (SRAM) cell in 90nm complementary metal oxide semiconductor (CMOS) technology. The leakage current mainly consists of sub threshold leakage current and gate leakage current in 90nm CMOS technology. So minimizing the sub thresho...
We demonstrate the advantages of dual-gate polysilicon nanoribbon biosensors with a comprehensive evaluation of different measurement schemes for pH and protein sensing. In particular, we compare the detection of voltage and current changes when top- and bottom-gate bias is applied. Measurements of pH show that a large voltage shift of 491 mV pH(-1) is obtained in the subthreshold region when t...
This paper examines the performance of a Gate-Engineered Gate-All-Around Charge Plasma Nanowire Field Effect Transistor (GAA-DMG-GS-CP NW-FET) and implementation common source (CS) amplifier circuit. The proposed GAA-DMG-GS-CP NW-FET incorporates dual-material gate (DMG) stack (GS) as engineering techniques its analog/RF parameters are compared to those Single-Material Gate (GAA-SMG-CP device. ...
This paper presents an analytical model for intrinsic short-circuit admittance (Y) parameters of DH-DD-TM-SG MOSFET. Y have been modeled using different small-signal equivalent circuit parameter which is used to find the Scattering parameters. These further employed computing S-parameters. are investigate microwave performance proposed device. The Unilateral Power Gain and maximum oscillation f...
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