The need for higher data rates is ever rising as wireless communication standards move from the third to the fourth generation. Turbo-Codes are the prevalent channel codes for wireless systems due to their excellent forward error correction capability. So far research has mainly focused on components of high throughput Turbo-Decoders. To the best of our knowledge, no complete Turbo-Decoder syst...

Industry demands Low-Power and HighPerformance devices now-a-days. Among the various embedded memory technologies, SRAM provides the highest performance along with low standby power consumption. In CMOS circuits, high leakage current in deep-submicron regimes is becoming a significant contributor to power dissipation due to reduction in threshold voltage, channel length, and gate oxide thicknes...

An investigation into an effective and low-complexity adaptive routing strategy based on stochastic principles for an asynchronous network-on-chip platform that includes dynamically reconfigurable computing nodes is presented. The approach is compared with classic deterministic routing and it is shown to have good properties in terms of throughput and excellent fault-tolerance capabilities. The...

With deep submicron technology nodes other methods are needed to obtain scaling factors rather than the traditional scaling factors which held for the pre-submicron era. This work presents scaling factors between major technology nodes between 180 nm and 22 nm operating at voltages from 1.8 V to 0.7 V. Common operating data for these technologies were taken from the International Technology Roa...

We report on a computational approach based on the self-consistent solution of the steady-state Boltzmann transport equation coupled with the Poisson equation for the study of inhomogeneous transport in deep submicron semiconductor structures. The nonlinear, coupled Poisson-Boltzmann system is solved numerically using finite difference and relaxation methods. We demonstrate our method by calcul...

With rapid technology scaling, the proportion of the static power consumption catches up with dynamic power consumption gradually. To decrease leakage consumption is becoming more and more important in low-power design. This paper presents a power-gating scheme for P-DTGAL (p-type dual transmission gate adiabatic logic) circuits to reduce leakage power dissipations under deep submicron process....

Process technology and architecture innovation are the two engines that have fueled a spectacular advancement in FPGAs over the past 10 years. During this period, the price of FPGAs has been reduced with 2 orders of magnitude, the logic capacity of FPGAs has been increased with 2 orders of magnitude and the performance has been increased with one order of magnitude. Whereas ASICs buck the tide ...