In this work we give efficient molecular computing solutions to eight well-known NP-complete problems, namely the Hamiltonian circuit, Longest path, Longest circuit, Path with forbidden pairs, Monochromatic triangle, Partition into triangles, Partition into paths of length two and Circuit satisfiability problems in the Parallel filtering model of Amos et al. We also show that this model can be ...

In this note, we investigate the complexity of circuits with modulo gates only in two ways. (i) We describe a procedure that converts a circuit with only modulo 2p gates, where p is a prime number, into a depth two circuit with modulo 2 gates at the input level and a modulo p gate at the output. (ii) We show some properties of such depth two circuits computing symmetric functions. Thus if we ca...

Modern digital circuit designing is now focussing on the reversible circuits. It aims towards the designing of low power loss circuits in the area of nanotechnology, quantum computing, optical computing, signal processing etc. This paper presents an optimized two-bit binary comparator based on reversible logic using Feynman, Toffoli, TR, URG and BJN gates. Optimization of the comparator circuit...

Bell’s Law predicts continual reductions in the size of computing systems. We investigate the status of the next paradigm shift that will usher in ubiquitous computing – submm sensor nodes. However, this form factor remains beyond the capabilities of modern integrated circuit design techniques due to battery size. This paper describes new ultra-low power circuit techniques applied to digital pr...

Bell’s Law predicts continual reductions in the size of computing systems. We investigate the status of the next paradigm shift that will usher in ubiquitous computing – submm3 sensor nodes. However, this form factor remains beyond the capabilities of modern integrated circuit design techniques due to battery size. This paper describes new ultra-low power circuit techniques applied to digital p...

Abstraction plays an important role in digital design, analysis and verification. This paper introduces a word-level abstraction of the function implemented by a combinational logic circuit. The abstraction provides a canonical representation of the function as a polynomial Z =F (A) over the finite field F2k , where Z,A represent the k-bit word-level output and input of the circuit, respectivel...

In this note, we prove that there is an explicit polynomial in VP such that any ΣΠΣ arithmetic circuit computing it must have size at least n3−o(1). Up to n factors, this strengthens a recent result of Kayal, Saha and Tavenas (ICALP 2016) which gives a polynomial in VNP with the property that any ΣΠΣ arithmetic circuit computing it must have size Ω̃(n).

Agrawal and Vinay [AV08] have recently shown that an exponential lower bound for depth four homogeneous circuits with bottom layer of × gates having sublinear fanin translates to an exponential lower bound for a general arithmetic circuit computing the permanent. Motivated by this, we examine the complexity of computing the permanent and determinant via homogeneous depth four circuits with boun...

Aalto University, P.O. Box 11000, FI-00076 Aalto www.aalto.fi Author Mikko Honkala Name of the doctoral dissertation Building blocks for fast circuit simulation Publisher School of Electrical Engineering Unit Department of Radio Science and Engineering Series Aalto University publication series DOCTORAL DISSERTATIONS 174/2012 Field of research Circuit theory Manuscript submitted 8 June 2012 Dat...

computation of the second order delay in rc-tree based circuits is important during the design process of modern vlsi systems with respect to having tree structure circuits. calculation of the second and higher order moments is possible in tree based networks. because of the closed form solution, computation speed and the ease of using the performance optimization in vlsi design methods such as...