NAND flash memories achieve very high densities through a series connection of all the cells in a bitline. In current memories, each wordline is read independently by biasing all the other cells to act as pass transistors and sensing all the bitlines in parallel. This paper proposes a new method which reads multiple wordlines simultaneously and returns a combination of their stored information....

Andorid which is the popular smart phone OS uses a database system to manage its private data storage. Although the database system supports a powerful and lighteweight database engine, its performance is limited by a single storage media, NAND flash memory, and a single file system, YAFFS2. In this paper, we propose a new embedded database system based on hybrid storage of PRAM and NAND flash ...

This paper advocates a device-aware design strategy to improve various NAND flash memory system performance metrics. It is well known that NAND flash memory program/erase (PE) cycling gradually degrades memory device raw storage reliability, and sufficiently strong error correction codes (ECC) must be used to ensure the PE cycling endurance. Hence, memory manufacturers must fabricate enough num...

SSDs use multiple NAND flash memory chips as storage media and deploy large sized RAM inside it in order to maintain the FTL mapping table. The rest portion of the inner RAM can be used as buffer. The buffer absorbs the read/write requests by file systems and thus the resulting write requests to NAND flash memory is determined by the buffer replacement scheme. The block-level LRU replacement sc...

3D NAND flash memories promise unprecedented flash storage capacities, which can be extremely important in certain application domains where both storage capacity and performance are first-class target metrics. However a block of 3D NAND flash contains many more pages than its 2D counterpart. This increased number of pages-per-block has numerous ramifications such as the longer erase latency, h...

We present second steps in the construction of formal models of NAND flash memory, based on a recently emerged open standard for such devices. The model is intended as a key part of a pilot project to develop a verified file store system based on flash memory. The project was proposed by Joshi and Holzmann as a contribution to the Grand Challenge in Verified Software, and involves constructing ...

In this paper, conventional main memory and disk storage layers are merged into a single memory layer using a combination of PRAM and NAND Flash memories, which is called as an integrated memory-disk (IM-D) non-volatile memory structure. The IM-D memory architecture consists of a dual buffering IM-D adapter, an array of SLC/MLC PRAM/Flash hybrid IM-D memory, and an associated memory management ...

NAND flash memory-based storage devices are increasingly adopted as one of the main alternatives for magnetic disk drives. The flash translation layer (FTL) is a software/hardware interface inside NAND flash memory, which allows existing disk-based applications to use it without any significant modifications. Since FTL has a critical impact on the performance of NAND flash-based devices, a vari...

Solid state devices are common choices for data and systems storage in many high assurance application domains due to features such as no moving parts, shock/temperature resistance and low power consumption. On the other hand, they present new challenges in data reliability concerns. In multilevel cell NAND flash memories the bit error rate increases exponentially with reduced endurance limit a...

NAND flash memory is ubiquitous in everyday life today because its capacity has continuously increased and cost has continuously decreased over decades. This positive growth is a result of two key trends: (1) effective process technology scaling; and (2) multi-level (e.g., MLC, TLC) cell data coding. Unfortunately, the reliability of raw data stored in flash memory has also continued to become ...