In the ultra low power end of design spectrum when performance is of secondary importance, digital subthreshold logic circuits are more applicable than the regular MOS logic. In this paper, we propose two different subthreshold logic families: 1) variable threshold voltage subthreshold CMOS (VT-Sub-CMOS) and 2) subthreshold dynamic threshold voltage MOS (SubDTMOS) logic. Both these logic famili...

This paper analyzes energy minimization of digital circuits operating at supply voltages above threshold and in the sub-threshold region. Circuit sizing and supply-voltage selection are simultaneously analyzed to determine where the minimum energy solution occurs. In this work we address the effects of architectural modifications on the design choices in different regions of operation. Two new ...

due to the expected increase of defects in circuits based on deep submicron technologies, reliability has become an important design criterion. although different approaches have been developed to estimate reliability in digital circuits and some measuring concepts have been separately presented to reveal the quality of analog circuit reliability in the literature, there is a gap to estimate re...

In present scenario, an increasing demand for mobile electronic devices such as cellular phones, laptop computers and personal digital assistants requires the use of power efficient circuits. To minimize the power dissipation and to increase the battery lifetime, the supply voltage, VDD has been scaled down continuously. So, scaling down the supply voltage, without scaling down the threshold vo...

Power is increasingly the primary design constraint for chip designers and one of the main techniques for addressing this concern is aggressive voltage scaling. Device variability increases with voltage scaling and significantly affects gate delays at low voltages. Although existing delay models for nearand sub-threshold circuits captures the effects of variability on gate delays, they do not c...

Novel medical applications involving embedded sensors, require ultra low energy dissipation with low-to-moderate performance (10kHz-100MHz) driving the conventional MOSFETs into sub-threshold operation regime. In this paper, we present an alternate ultra-low power computing architecture using Binary Decision Diagram based logic circuits implemented using Single Electron Transistors (SETs) opera...

Level shifters play critical roles in ultra low-voltage circuits and systems. a new low power level shifter (LS) is presented for robust logic voltage shifting from near/sub threshold to above threshold domain. The new circuit combines the multi threshold CMOS technique along with novel topological modifications to guarantee a wide voltage conversion range with limited static power and total en...

Leakage power is the main dominant source of power dissipation for Sub-lOOlJm VLSI circuits. Various techniques were proposed to reduce the leakage power dissipation; one of these techniques is Multi-Threshold voltage. In this paper, the exact and optimal values of Threshold Voltage (Vth) for each transistor of the design are found for any sequential circuit. This is achieved by applying Artifi...