A 0.25m, four-layer-metal, 1.5-V, 600-MHz, fully depleted (FD) silicon-on-insulator (SOI) CMOS 64-bit ALPHA1 microprocessor integrating 9.66 million transistors on a 209-mm silicon die has been developed leveraging the existing bulk design. FD-SOI technology is used because it has better immunity for dynamic leakage current than partially depleted SOI in highspeed dynamic circuits without body ...

Synchrotron-based X-ray microbeam measurements were performed on silicon-on-insulator (SOI) features strained by adjacent shallow-trench-isolation (STI). Strain engineering in microelectronic technology represents an important aspect of the enhancement in complementary metal-oxide semiconductor (CMOS) device performance. Because of the complexity of the composite geometry associated with microe...

The use of compliant silicon-on-insulator ~SOI! substrates instead of Si substrates is shown to improve the quality of epitaxial GaN layers by releasing the strain and absorbing the generated threading dislocations in the thin Si overlay of the SOI substrate. GaN layers have been grown on SOI substrates by low-pressure metalorganic chemical vapor deposition and various growth conditions and com...

Changing patterns of correlations between the historical average June–November Southern Oscillation Index (SOI) and October–March precipitation totals for 84 climate divisions in the western US indicate a large amount of variability in SOI/precipitation relations on decadal time scales. Correlations of western US precipitation with SOI and other indices of tropical El Niño–Southern Oscillation ...

The Sociosexual Orientation Inventory (SOI; Simpson & Gangestad 1991) is a self-report measure of individual differences in human mating strategies. Low SOI scores signify that a person is sociosexually restricted, or follows a more monogamous mating strategy. High SOI scores indicate that an individual is unrestricted, or has a more promiscuous mating strategy. As part of the International Sex...

Abstract The impacts of negative and positive bias temperature instabilities (NBTI and PBTI) on the stability of ultra-thin-body (UTB) GeOI 6T SRAM cell and performance of sense amplifier compared with the SOI counterparts are analyzed and discussed in this report. Worst case stress scenarios for read and write operations are analyzed. For UTB GeOI SRAMs, PBTI dominates the degradations in read...

The high-voltage and self-heating behavior of partial-SOI (silicon-on-insulator) LDMOSFETs were studied numerically. Different locations of the silicon window were considered to investigate the electrical and thermal effects. It is found that the potential distribution of the partial-SOI LDMOSFET with the silicon window under the drain is similar to that of standard junction isolation devices. ...

The silicon-on-insulator (SOI) CMOS technology has a number of advantages over the standard bulk CMOS technology, such as no latch-up effect, high speed and low power. The fully depleted SOI (FD-SOI) technology provided by OKI Electric Industry Co., Ltd. is realizing the full features of the advantages with lowest junction capacitance. Test element group (TEG) structures of transistors were fab...

This work introduces the use of GradedChannel SOI MOSFETs to make analog current mirrors and compare their performance with those made with conventional fully depleted SOI transistors. It is demonstrated that Graded-Channel MOSFETs can provide higher precision current mirror with enhanced output swing. Also lesser modifications of the output characteristics due to the self-heating effect than i...

A current-mode output driver that supports SERDES applications is implemented using 0.13 μm Bulk and PD SOI CMOS technologies. Schematic simulation results confirm the enhanced performance of PD SOI for very high-speed interfaces. The PD SOI current-mode driver shows a 3 times lower data dependent jitter than the Bulk current-mode driver at the same 3.125 Gbps data rate of XAUI standard.