The design of high-accuracy analogue circuits is becoming a difficult task with the scaling down of supply voltages and transistor channel lengths of the current mixed-signal integrated circuits. Most of this kind of circuits require the use of the highestperformance active cell: the operational amplifier (op amp). Designers are continuously working toward tradeoff solutions between gain, input...

This letter describes the use of a power-optimized cascode configuration for obtaining maximum output power at millimeter-wave (mm-wave) frequencies for a two-way combined power amplifier (PA). The PA has been fabricated in a high-speed InP double heterojunction bipolar transistor technology and has a total active emitter area of 68.4 lm2. The experimental results demonstrate a small signal gai...

A new very high performance low voltage cascode current mirror (CM) circuit is proposed in this work. The CM utilizes the low supply voltage and low input resistance characteristics of a cascode CM. In this CM, cascode configuration is used to obtain a wide operating current range and resistance compensation technique is incorporated to increase the operating bandwidth. The peaking in frequency...

In this paper, we propose a multistage transimpedance amplifier (TIA) based on the local negative feedback technique. Compared with conventional global-feedback technique, proposed TIA has advantages of wider bandwidth, and lower power dissipation. The schematic characteristics circuit are described. Moreover, employs inductive peaking to increase bandwidth. is implemented using 65 nm complemen...

A current mirror (CM) based on self cascode arrangement, useful for low voltage analog and mixed mode circuit is proposed. The CM uses 4 MOSFETs, has high input and output swing, operating at ± 0.5 V supply. Pspice simulations confirm the high performance of this CM having a bandwidth of 2.1 GHz. Resistive and capacitive compensations result in about threefold bandwidth increase to 6.1 GHz.

This work presents a comparative study of the transcapacitances an asymmetric self-cascode (A-SC) and graded-channel (GC) silicon-on-insulator (SOI) nMOSFETs with different gate lengths. analysis was done by means two-dimensional numerical simulations. Simulated results show influence others on gate-to-gate capacitance for ASC SOI device GC device.

In this paper we present a three-stage fully differential operational amplifier in 120nm digital CMOS. To reach high gain gain-boosted cascodes in the first stage are used. The gain-boost amplifiers are realized as two-stage amplifiers with self cascodes. A DC gain of 108dB and an unity-gain frequency of 1.06GHz are achieved at 1.2V supply. The operational amplifier is appropriate for supply vo...

A b s t r a c t Keywords: Cascode Topology Low Noise Amplifier Noise Figure Particle Swarm Optimization Design of a LNA is a complex process. Because it involves various parameters and needs complex trade-offs. This paper presents an optimized design of a low noise amplifier (LNA) using particle swarm optimization (PSO) technique. The proposed LNA has a cascode structure with inductive source d...

Abstract In this paper, a 12-bit 100MS/s digital-to-analog converter (DAC) is presented, where segmented current steering technique employed. A “4+8” architecture used compromising the advantages and disadvantages of binary-weighted thermometer-coded DACs. Cascode source cascode switch to achieve high input impedance minimize output glitches for good linearity dynamic performance. The simulatio...