Reversible sequential circuits are going to be the significant memory blocks for the forthcoming computing devices for their ultra low power consumption. Therefore design of various types of latches has been considered a major objective for the researchers quite a long time. In this paper we proposed efficient design of reversible sequential circuits that are optimized in terms of quantum cost,...

In this paper, we address the issue of obtaining compact canonical representations of datapath circuits with sequential elements, for the purpose of equivalence checking. First, we demonstrate the mechanisms for efficient compositional construction of Arithmetic Transform (AT), which is the underlying function representation, used in modern word-level decision diagrams. Second, we introduce a w...

Abstract: The use of asynchronous sequential circuits has brought many advantages to system development, given the following examples:  Signal interface protocols (for example SCSI)  Asynchronous circuits are ideal for building modular systems. This modular structure enables a global system time checkup. The asynchronous circuits developed for high performance systems, for speeds up to 75 MHz...

Verification and Synthesis of Clock-Gated Circuits by Yu-Yun Dai Doctor of Philosophy in Engineering-Electrical Engineering and Computer Sciences University of California, Berkeley Professor Robert K. Brayton, Chair As system complexity and transistor density increase, the power consumed by digital integrated circuits has become a critical constraint for VLSI design and manufacturing. To reduce...

Recently developed methods for power estimation have primarily focused on combinational logic. In this paper, we present a framework for the eecient and accurate estimation of average power dissipation in sequential circuits. Switching activity is the primary cause of power dissipation in CMOS circuits. Accurate switching activity estimation for sequential circuits is considerably more diicult ...

In recent literature, Reversible logic has become one of the promising arena in low power dissipating circuit design in the past few years and has found its applications in low power CMOS circuits , optical information processing and nanotechnology. The reversible circuits form the basic building block of quantum computers as all quantum operations are reversible. This paper presents asynchrono...

Soft errors have been a critical reliability concern in nanoscale integrated circuits, especially in sequential circuits where a latched error can be propagated for multiple clock cycles and affect more than one output, more than once. This paper presents an analytical methodology for enhancing the soft error tolerance of sequential circuits. By using clock skew scheduling, we propose to minimi...

This study presents the importance of reversible logic in designing of high performance and low power consumption digital circuits. In our research, the various forms of sequential reversible circuits such as D, T, SR and JK flip-flops are investigated based on carbon nanotube field-effect transistors. All reversible flip-flops are simulated in two voltages, 0.3 and 0.5 Volt. Our results show t...

The dissertation thesis is aimed at test generation for asynchronous sequential digital circuits, contributes to their timeand cost-effective testing, and indirectly supports their wider application, which improves the performance, the power consumption and the electromagnetic emission of future digital circuits. The main scientific contribution is design of the new test generator (optimized fo...

In this work we investigate the eeectiveness of genetic algorithms (GAs) in the test generation process. We use simple GAs to generate populations of candidate test vectors and to select the best vector to apply in each time frame. A sequential circuit fault simula-tor is used to evaluate the tness of each candidate vector , allowing the test generator to be used for both com-binational and seq...