We investigate the equivalence checking of the RTL hardware implementation of the Cambridge Fairisle Asynchronous Transfer Mode (ATM) 4 by 4 switch fabric against a high-level behavioral specification which has no restrictions with respect to the frame size, cell length or word width. The verification is based on the reachability analysis of the product machine of the implementation and the spe...

method to obtain the minimum number of nodes in Reduced Ordered Binary Decision Diagrams (ROBDD). The proposed method uses the graph topology to find the best variable ordering. Therefore the input Boolean function is converted to a unidirectional graph. Three levels of graph parameters are used to increase the probability of having a good variable ordering. The initial level uses the total num...

The logic of equality and uninterpreted functions (EUF) has been proposed for processor verification. This paper presents a new data structure called Binary Decision Diagrams for representing EUF formulas (EUF-BDDs). We define EUF-BDDs similar to BDDs, but we allow equalities between terms as labels instead of Boolean variables. We provide an approach to build a reduced ordered EUF-BDD (EUF-ROB...

We present in this paper the method of Generalized Nodal Control for standby leakage power reduction. First, a sparse set of input and internal nodes to control are identified using a novel algorithm based on Reduced Ordered Binary Decision Diagrams (ROBDDs) and Fiduccia-Mattheyses Partitioning. Then, customized control gates with ”forced” transistor stacks are inserted at these select location...

* This work is supported by research project of Zhejiang Normal University Xingzhi college(No. 23) And Opening Fund of Top Key Discipline of Computer Software and Theory in Zhejiang Provincial Colleges at Zhejiang Normal University(No. ZSDZZZZXK21). Abstract We consider the problem of the infrastructure communication reliability (ICR) of wireless sensor networks (WSN) on sink-manycast and sink-...

Traditional ROBDD-based methods of automated veri cation su er from the drawback that they require a binary representation of the circuit. To overcome this limitation we propose a broader class of decision graphs, called Multiway Decision Graphs (MDGs), of which ROBDDs are a special case. With MDGs, a data value is represented by a single variable of abstract type, rather than by 32 or 64 boole...

One of the crucial problems multi-level logic synthesis techniques for multi-output boolean functions f =

Constraint programming is a step toward ideal programming: you merely define the problem domain and the constraints the solution must meet and let the computer do the rest. Many constraint programming languages have been developed; the majority of them employ iterative constraint propagation over the problem variables. While such an approach solves many problems and can handle very rich data ty...

The mainstream arrival of predication, a means other than branching of selecting instructions for execution, has required compiler architects to reformulate fundamental analyses and transformations. Traditionally, the compiler has generated branches straightforwardly to implement control flow designed by the programmer and has then performed sophisticated “global” optimizations to move and opti...

The aggressive scaling of CMOS technology below 90nm brings forth many great new physical challenges that must be addressed in the forefront of the design cycle. In addition to meeting the usual timing and dynamic/switching power budgets, designers must also now carefully consider issues such as leakage current/power, crosstalk noise, electromigration, IR drop, and even manufacturing process va...