نتایج جستجو برای: phase locked loop

تعداد نتایج: 725981  

1999
B C Block

The CD4046BC micropower phase-locked loop (PLL) consists of a low power, linear, voltage-controlled oscillator (VCO), a source follower, a zener diode, and two phase comparators. The two phase comparators have a common signal input and a common comparator input. The signal input can be directly coupled for a large voltage signal, or capacitively coupled to the self-biasing amplifier at the sign...

2004

The fundamental design concepts for phase-locked loops implemented with integrated circuits are outlined. The necessary equations required to evaluate the basic loop performance are given in conjunction with a brief design example. NOTE This document contains references to obsolete part numbers and is offered for technical information only.

2002
Jonathan Cheung

For high speed application, jitter is a problem to communication system, as it reduces the performance of overall circuitry. As jitter is a type of corruption that cannot be eliminated, reducing jitter is one way to help to improve the system performance. In this paper, we introduce some ways to reduce the jitter in phase-locked loop. Introduction Phase-Locked Loop, PLL, is widely used among th...

1999

There are a number of high volume applications for DC motors that require precision control of the motor’s speed. Phase locked loop techniques are well suited to provide this control by phase locking the motor to a stable and accurate reference frequency. In this paper, the small signal characteristics, and several large signal effects, of these loops are considered. Models are given for the lo...

In this paper, a dual loop PLL with short locking time, low power consumption and low reference spur is presented. The output frequency and reference frequency of the designed circuit are 3.2 GHz and 50 MHz, respectively, aimed to WiMAX applications. In the proposed circuit in locked state, some parts of the circuit could be powered off, to reduce overall power consumption. Phase detection in t...

Journal: :IEE Proceedings - Circuits, Devices and Systems 1997

2011
Yang Liu Ashok Srivastava Yao Xu

In this paper, a new strategy of switchable CMOS phase-locked loop frequency synthesizer is proposed to increase its tuning range. The switchable PLL which integrates two phase-locked loops with different tuning frequencies are designed and fabricated in 0.5 μm n-well CMOS process. Cadence/Spectre simulations show that the frequency range of the switchable phased-locked loop is between 320 MHz ...

2008
Y. Li

Design and experimental validation of a simple photonic phase-lockedloop (PPLL) linear phase demodulator employing a novel attenuating counter propagating (ACP) in-loop phase modulator are presented. The ACP in-loop phase modulator is free of propagation delay, allowing stable operation of the PPLL with large gain. Highly linear optical phase demodulation was observed and the measured spurious ...

2010
D. Richard Brown Yizheng Liao Neil Fox

This paper presents a low-complexity real-time single-tone phase and frequency estimation technique based on zero-crossing detection and linear regression. The proposed zerocrossing phase and frequency estimator fills a gap between lowcomplexity phase locked loop estimation and high-performance maximum likelihood estimation. Similar to a phase locked loop, the zero-crossing phase and frequency ...

Journal: :Journal of Low Power Electronics and Applications 2019

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