Computing a ll-reducing ordering of a sparse matrix is a central problem in the solution of sparse linear systems using direct methods. In recent years, there has been signiicant research in developing a sparse direct solver suitable for message-passing multiprocessors. However, computing the ordering step in parallel remains a challenge and there are very few methods available. This paper desc...

nowadays, due to inherent complexity of real optimization problems, it has always been a challenging issue to develop a solution algorithm to these problems. single row facility layout problem (srflp) is a np-hard problem of arranging a number of rectangular facilities with varying length on one side of a straight line with aim of minimizing the weighted sum of the distance between all facility...

recently, lotfi et al. [10] established an equivalence model between the output-oriented dual ccr model and multiple objective linear programming (molp) and used an interactive method for finding target unit on efficiency frontier such that the decision maker preferences can be taken into account. however their method is not applicable for situations in which some outputs are undesirable and ne...

This study aims to deal with a more realistic combined problem of project scheduling and material ordering. The goal is to minimize the total material holding and ordering costs by determining the starting time of activities along with material ordering schedules subject to some constraints. The problem is first mathematically modelled. Then a hybrid simulated annealing and genetic algorithm is...

We identify an important class of symmetries in constraint programming, arising from matrices of decision variables where rows and columns can be swapped. Whilst lexicographically ordering the rows (columns) breaks all the row (column) symmetries, lexicographically ordering both the rows and the columns fails to break all the compositions of the row and column symmetries. Nevertheless, our expe...

We present an algorithmic analog-to-digital converter (ADC) architecture for large-scale parallel quantization of internally analog variables in externally digital array processors. The converter quantizes and accumulates a binary weighted sequence of partial binary-binary matrix-vector products computed on the analog array, under presentation of bit-serial inputs in descending binary order. Th...