This paper studies interconnect delay and area estimation for multiple-pin nets with consideration of interconnect optimizations, including optimal wire sizing (OWS), and simultaneous bu er insertion/sizing and wire sizing (BISWS), under two types of optimization objectives: one is to minimize delay to a single critical sink, and the other is to minimize the maximum delay to all critical sinks....

This paper derives a methodology for developing accurate convex delay models to be used for transistor sizing. A new rich class of convex functions to model gate delay is presented and the circuit delay under such a model is shown to be equivalent to a convex function. The richness of these functions is exploited to accurately model gate delay for modern designs. Since the delay under this mode...

This paper presents a new approach using simultaneous voltage-scaling and gate-sizing for low power without violating the timing constraints. We provide the problem formulation in this application, and propose algorithms for single voltagescaling, single gate-sizing, and their simultaneous manipulation. We target a globally optimal solution by showing how the power optimization is related to th...

\Optimal wire sizing and buuer insertion for low power and a generalized delay model," in Proc. 17 problems are solved in the context of simultaneous device and wire sizing optimization for deep submicron designs. Experiments show that our LR-based optimization algorithm is very eeective and extremely eecient. Up to 16.5% delay reduction is observed when compared with previous work based on the...

This project bestows optimal sizing and placement of FACTS device, which is achieved by the searching method of bacteria foraging algorithm (BFA) with optimal sizing of FACTS device. Static Var Compensator (SVC) is one of the FACTS devices, utilized for progress of voltage profile and loss minimization. The precise strategy of SVC offers the real power loss minimization with increase of voltage...

Distributed generation allows achieving large savings or causing technical problems, depending on the generation size, type and location. The optimal location and sizing of DG is a challenging problem and requires a multiobjective programming approach. In this paper the aspects of the DG siting and sizing problem are highlighted considering the simultaneous optimization of several objective fun...

We compare the effectiveness of uniform versus non-uniform waveband switching under the dual cost metrics of switching requirements and fiber capacity. We consider a star topology and begin by characterizing the optimal performance frontier achievable under no restrictions on waveband sizing, and provide algorithms employing non-uniform waveband sizing that approach or achieve this optimum. We ...