Keeping the density of traffic flow and air pollution in an acceptable level and developing a good capacity for transit in the high priority areas of the city, is really a big deal in large and crowded cities. To address this problem, a new method of intersection signal optimization is presented in this paper. Based on network fundamental diagrams, an Internal–External Traffic Metering Strategy...

In heterogeneous tiled System-on-Chip architectures a Network-on-Chip is used to transport messages between processing elements. A reconfigurable network interface is used to connect the processing elements to the Network-on-Chip, converting the messages between both domains. This paper introduces the Hydra: a network interface for the MONTIUM TP, a coarse-grained reconfigurable processor desig...

The Virtual Interface Architecture brings the benefits of low latency User-level Networking to a cluster environment. With an increasing number of communication channels created and used, the performance degradation of existing channels becomes an important consideration. This paper addresses the crucial issue of VIA scalability by examining the hardware and software options at the network inte...

This paper addresses how formal veri cation can be applied to nd a bottleneck in a gigabit network interface card that prevents the card from achieving the best possible performance. Finding a bottleneck in a gigabit network interface card is not an easy task because it is equipped with sophisticated hardware components, such as multiple DMA engines and separate CPU and memory. Therefore, the i...

RiceNIC is a reconfigurable and programmable Gigabit Ethernet network interface card (NIC). It is an open platform meant for research and education into network interface design. The NIC is implemented on a commercial FPGA prototyping board that includes two Xilinx FPGAs, a Gigabit Ethernet interface, a PCI interface, and both SRAM and DRAM memories. The Xilinx Virtex-II Pro FPGA on the board a...

In ATM networks the user network interface con guration strongly in uences the per formance of the network and determines the functional complexity of network elements A main issue for example is the location of tra c shaping devices at the private and public user network interface Tra c shaping may be performed by customer premises equipment or by ATM switches itself This paper presents a deco...

Maestro is a distributed shared memory system currently being developed. In this paper, an architecture of the high performance network interface of Maestro is presented. Maestro consists of multiple PC(Personal Computer)s and dedicated network hardware for high performance message passing and maintaining cache coherency. IEEE1394, a high performance serial link, is used in the physical layer o...

the discharge or runoff which ousts from a watershed is important. because its deficiency leads to financial losses and its excesses cause damage in lives and property as flood. in this research using artificial neural network multi-layer perceptron (mlp (and adaptive neuro-fuzzy interface system (anfis) and multiple regression method simulated rainfall- runoff process on daily basis in the kho...