Scheduling of real-time tasks on a multi-processor system is an NP-hard problem. This paper aims to propose an algorithm based on multi-objective GA (MOGA) for scheduling of static soft real-time tasks on a heterogeneous multi-processor system when the real-world constraints including the precedence relationship between tasks, different arrival time for each task as well as communication delays...

With the wide application of heterogeneous multi-core processor real-time systems, existing analysis methods worst-case response time (WCRT) overestimate blocking information among tasks, resulting in a rather pessimistic estimation. To improve accuracy WCRT, we propose reconstruction-based WCRT method for multi-type directed acyclic graph (DAG) tasks scheduling algorithm(RMDS). The RMDS algori...

Current and future communications systems have to provide a large degree of flexibility e.g. to provide multi-service ability, seamless roaming, softinfrastructure upgrading, user-defined propriety, simultaneous multi-standard operation, and different quality of service. This paper presents a multi-processor platform for the application domain of channel decoding. Inherently parallel decoding t...

Modern computer architectures have evolved from uni-processor platforms to multi-processor and multi-core platforms, but traditional real-time distributed middleware such as RT-CORBA has not kept pace with that evolution. To address those issues, this paper describes the design and implementation of MCFlow, a new real-time distributed middleware for dependent task graphs running on multi-core p...

For a timing-critical system, it is mandatory to guarantee upper bounds on the execution times of its programs. Such bounds can be derived using worst-case execution time (WCET) analysis. WCET analysis for multi-core processors is challenging as the behavior of one processor core in general depends on the behavior of the other cores. A common option to reduce this dependency is the use of time ...

Multi-tasking multiprocessor systems frequently use rendezvous for intertask communication , and Stochastic Rendezvous Networks are a form of performance model for such systems. Tasks are frequently given diierent priorities to adjust the system performance. This paper considers a pre-emptive-resume priority discipline for executing tasks sharing each processor. An iterative algorithm is propos...

Ternary optical computer (TOC) has become a research hotspot in the field because of advantages such as inherent parallelism, numerous trits, low power consumption, extendibility, bitwise allocability and dynamical reconfigurability. Meanwhile, its performance evaluation attracts more attentions from potential users researchers. To model computing ecology accurately, this paper first builds thr...

Systems controlled by embedded computers become indispensable in our lives and can be found in avionics, automotive industry, home appliances, medicine, telecommunication industry, mecatronics, space industry, etc. Fast, accurate and flexible performance estimation tools giving feedback to the designer in every design phase are a vital part of a design process capable to produce high quality de...

A parallel arithmetic array processor for accelerating compute-intensive applications in low-power embedded systems is proposed in this study. The proposed flexible hardware architecture enables the fast execution of both control-dominated and compute-centric streaming computation tasks on the same array. Consequently, multiple levels of parallelism can be efficiently exploited. A test chip int...