Clock-gating techniques are very effective in the reduction of the switching activity in sequential logic circuits. In this paper, we describe a clock-gating technique based on finite-state machine (FSM) decomposition. The approach is based on the computation of two sub-FSMs that together have the same functionality as the original FSM. For all the transitions within one sub-FSM, the clock for ...

In this paper we present a new method for the decomposition of a Finite State Machine (FSM) into a network of interacting FSMs and a framework for the functional veriication and simulation of the FSM network at diierent levels of abstraction. The problem of decomposition is solved using a multiway graph partitioning technique. The number of submachines is determined dynamically during the parti...

In this paper, we present a novel conformance test suite derivation method. Similar to the HIS method, our method uses harmonized state identifiers for state identification and transition checking and can be applied to any reduced possibly partial deterministic or nondeterministic specification FSM. However, in contrast with the HIS method, in the proposed method appropriate state identifiers a...

Functional size has been favored as a software characteristic that can be measured early and independent of language, tools, techniques and technology; hence has many uses in software project management. It has been about three decades since Albrecht introduced the concept of functional size. However, Functional Size Measurement (FSM) has not been a common practice in software community. The pr...

Several methods have been proposed for synthesizing communication protocol specifications starting from given service specifications. Due to the inherently sequential nature of a finite state machine (FSM), some FSM-based protocol synthesis methods assume that primitives in the service specifications cannot be executed simultaneously. However, other synthesis methods were introduced to handle c...

The proposed method is targeted on reduction of hardware amount in logic circuit of Moore finite-state machine implemented with programmable logic arrays (PLA). The method is based on using more than minimal amount of variables in codes of FSM internal states. The method includes two stages of state encoding. The second stage is connected with recoding of states inside each class of pseudoequiv...

We discuss the relationship between algebras, coalgebras, and Frobenius algebras. We describe a method of constructing a Frobenius algebra, given a finite-dimensional algebra, and we demonstrate the method with several concrete examples.

A method allowing a desirable matrix spectrum to be constructed as an alternative to the method using matrix transformation to the Frobenius form is stated. It can be applied to implement control algorithms for technical systems without executing the variables transformation procedures that are needed for deriving a Frobenius matrix. The method can be used for simulation of systems with differe...

Finite state machine (FSM) representation is widely used to perform behavioural analysis and generate test cases from a set of hierarchically organized scenarios written in Message Sequence Charts (MSCs). Brute-force approach of translating MSCs into FSM is impractical, especially when scenarios are executed concurrently. In this paper, we describe how to identify a sequence of message exchange...