In recent years there has been a flurry of activity proving lower bounds for homogeneous depth-4 arithmetic circuits [GKKS13, FLMS14, KLSS14, KS14c], which has brought us very close to statements that are known to imply VP 6= VNP. It is a big question to go beyond homogeneity, and in this paper we make progress towards this by considering depth-4 circuits of low algebraic rank, which are a natu...

This paper presents a system for the automatic generation of Galois-field (GF) arithmetic circuits, named the GF Arithmetic Module Generator (GF-AMG). The proposed system employs a graph-based circuit description called the GF Arithmetic Circuit Graph (GF-ACG). First, we present an extension of the GF-ACG to handle GF(pm) (p ≥ 3) arithmetic circuits, which can be efficiently implemented by mult...

In this note, we prove that there is an explicit polynomial in VP such that any ΣΠΣ arithmetic circuit computing it must have size at least n3−o(1). Up to n factors, this strengthens a recent result of Kayal, Saha and Tavenas (ICALP 2016) which gives a polynomial in VNP with the property that any ΣΠΣ arithmetic circuit computing it must have size Ω̃(n).

In this paper, we present a VLSI realisation of an on-line arithmetic co-processor that implements a novel algorithm known as BKM. The obtained circuit computes the complex exponential or logarithm functions. All basic mathematical operations can hence be computed. The obtained circuit might be considered as the first on-line arithmetic co-processor. The chip was designed using a specific CMOS ...

In order to solve the problems caused by large dataset, such as the network scale and the training time, a new method of analog circuit fault diagnosis based on distributed neural network is presented in this paper. The model of distributed neural network is simply introduced. The arithmetic mechanism is depicted in detail and the arithmetic description is given. Simulation results show that th...

Recently, thermal-aware digital circuit design in advanced technologies is great challenges to realize high-speed and robust microprocessors. In this paper, we explore temperature gradient alleviating method for arithmetic units. Aiming at alleviating temperature gradients at logical circuit design level, we try to flatten out a power density by applying delay-balancing technique for equaldelay...

The paper solves the enumeration of set partitions in which nondecreasing sequence parts , is contained a degree-2 polynomial . This generalization number into arithmetic progressions. We also study problem dividing whose differences between consecutive are integers. In particular, we focus on sum triangular numbers.

We explore the expressivity of constraint satisfaction problems (CSPs) in the arithmetic circuit model. While CSPs are known to yield VNP-complete polynomials in the general case, we show that for different restrictions of the structure of the CSPs we get characterizations of different arithmetic circuit classes. In particular we give the first natural non-circuit characterization of VP, the cl...

We show that over fields of characteristic zero there does not exist a polynomial p(n) and a constant-free succinct arithmetic circuit family {Φn}, where Φn has size at most p(n) and depth O(1), such that Φn computes the n × n permanent. A circuit family {Φn} is succinct if there exists a nonuniform Boolean circuit family {Cn} with O(logn) many inputs and size n such that that Cn can correctly ...

To meet the real-time diagnosis requirements of complex systems, this paper presents a novel fault diagnosis framework based on dynamic fault tree and arithmetic circuit. It pays attention to meeting two challenges: model development and real-time reasoning. Specifically, we use a dynamic fault tree to model dynamic fault modes and calculate some quantitative parameters using algebraic techniqu...