Abstract The impacts of negative and positive bias temperature instabilities (NBTI and PBTI) on the stability of ultra-thin-body (UTB) GeOI 6T SRAM cell and performance of sense amplifier compared with the SOI counterparts are analyzed and discussed in this report. Worst case stress scenarios for read and write operations are analyzed. For UTB GeOI SRAMs, PBTI dominates the degradations in read...

We present a fully integrated 12.5-Gb/s optical receiver fabricated with standard 0.13-µm complementary metal-oxide-semiconductor (CMOS) technology for 850-nm optical interconnect applications. Our integrated optical receiver includes a newly proposed CMOS-compatible spatially-modulated avalanche photodetector, which provides larger photodetection bandwidth than previously reported CMOS-compati...

A class A/B BiCMOS power op-amp designed to drive the L/R load of a disk drive head actuator is presented. The amplifier uses totem pole NMOS outputs instead of bipolar devices to avoid the high collector resistance in the simplified process used. A unique floating buffer technique regulates the quiescent totem pole current of the output devices and provides control for deep triode NMOS operati...

This paper presents a Ka-band three-stage power amplifier for 5G communications, which has been implemented in 150 nm GaN-on-SiC technology and adopts Doherty architecture. The is made up of 50 Ω input buffer, drives splitter, thanks to it delivers its output the two units topology, namely main auxiliary amplifier. Finally, outputs amplifiers are properly arranged current combining scheme that ...

SNTs (surrounding-gate nanowire transistors) are good candidates to implement low power electronic devices. They provide full gate control over the channel and minimize short channel effects. Design of a high-speed opamp is presented in this paper. It consists of two amplifying stages and an output buffer and is frequency compensated for stable operation. Transistors used have 10nm channel leng...

A new fully differential (FD) low input impedance CMOS current buffer with low voltage, and low power operation is presented. The low input impedance is achieved by remarkable reduction of the input node voltage swing using a novel double feedback scheme. Some advantages of the proposed double feedback scheme over the conventional (either positive or negative) feedback techniques are: lower inp...

ISSN: 2347-8578 www.ijcstjournal.org Page 315 A 3-6 Ghz Current Reuse Noise Cancelling Low Noise Amplifier For WLAN And WPAN Application Shivabhakt Mhalasakant Hanamant [1], Dr.S.D.Shirbahadurakar [2] M.E Student , Guide [2] Department of E & TC Dr. D.Y.Patil COE, Ambi Pune – India ABSTRACT A wideband low-noise amplifier (LNA), which is a key block in the design of broadband receivers for multi...