It has been known for a long time that t-designs can be employed to construct both linear and nonlinear codes and that the codewords of a fixed weight in a code may hold a t-design. While a lot of progress in the direction of constructing codes from t-designs has been made, only a small amount of work on the construction of t-designs from codes has been done. The objective of this paper is to c...

SUMMARY Unintended and parasitic coupling effects are becoming more relevant in currently designed, small-scale/high-frequency RFICs. Electromagnetic (EM) based procedures must be used to generate accurate models for proper verification of system behaviour. But these EM methodologies may take advantage of structural subsystem organization as well as information inherent to the IC physical layou...

An important challenge concerning the design of future microprocessors is that current design methodologies are becoming impractical due to long simulation runs and due to the fact that chip layout considerations are not incorporated in early design stages. In this paper, we show that statistical modeling can be used to speed up the architectural simulations and is thus viable for early design ...

Future lithography systems must produce microchips with smaller feature sizes, while maintaining throughputs comparable to those of today’s optical lithography systems. This places stringent constraints on the effective data throughput of any maskless lithography system. In recent years, we have developed a datapath architecture for directwrite lithography systems, and have shown that compressi...

This paper shows how to generate a cache-oblivious memory layout of a well-shaped finite-element mesh G. This cache-oblivious mesh layout enables asymptotically optimal mesh updates, in which each vertex communicates with all of its neighbors. Mesh updates is the building block of iterative linear system solver. For block size B and cache size M, the mesh update cost is O(1+ |G|/B), assuming th...

Electron-beam direct-write (EBDW) lithography systems must in the future transmit terabits of information per second to be viable for commercial semiconductor manufacturing. Lossless layout image compression algorithms with high decoding throughputs and modest decoding resources are tools to address the data transfer portion of the throughput problem. The earlier lossless layout image compressi...

Warehouse is one of the important aspects of a company. Therefore, it is necessary to improve Warehouse Management System (WMS) to have a simple function that can determine the layout of the storage goods. In this paper we propose an improved warehouse layout method based on ant colony algorithm and backtracking algorithm. The method works on two steps. First, it generates a solutions parameter...

We introduce a task-parallel algorithm for sparse incomplete Cholesky factorization that utilizes a 2D sparse partitioned-block layout of a matrix. Our factorization algorithm follows the idea of algorithms-by-blocks by using the block layout. The algorithm-byblocks approach induces a task graph for the factorization. These tasks are inter-related to each other through their data dependences in...

Recent block-based native XML storage systems such as IDEFIX touch blocks according to the XQuery engine’s execution plan. The resulting access patterns are virtually unknown and potentially cause many expensive disk seeks. Visualization comes to the rescue when extensive log files must be analyzed – a tedious and difficult task. The dynamic time-based block-touch animation as well as the stati...

The block-packing problem has applications in chip design, factory layout, container shipment optimization, scheduling and other areas. It has been actively studied in the last 20 years, but symmetry in packings has been neglected. Our work deals with symmetry in several formulations of block-packing, including optimization and constraint-satisfaction variants, as well as slicing and non-slicin...