This article presents an ultra-low-power parallel computing platform and its system-on-chip (SoC) embodiment, targeting a wide range of emerging near-sensor processing tasks for Internet of Things (IoT) applications. The proposed SoC achieves 193 million operations per second (MOPS) per mW at 162 MOPS (32 bits), improving the first-generation Parallel Ultra-Low-Power (PULP) architecture by 6.4 ...

This paper presents new circuit configurations for a more robust and efficient form of self-resetting CMOS (SRCMOS). Prior structures for SRCMOS have very high performance but are difficult to design and are not robust over process, temperature and voltage variations. The new techniques replace delay chains with logical circuits that will create pulses at the correct times, independent of opera...

This paper presents a thorough analysis of the AEAD scheme NORX, focussing on differential and rotational properties. We first introduce mathematical models that describe differential propagation with respect to the non-linear operation of NORX. Afterwards, we adapt a framework previously proposed for ARX designs allowing us to automatise the search for differentials and characteristics. We giv...

Lowering power consumption in microprocessors, whether used in portables or not, has now become one of the most critical design concerns. On-chip cache memories tend to occupy dominant chip area in microprocessors, and it becomes increasingly important to design power-efficient cache memories. This paper describes an experimental low-power on-chip cache system designed for a 32-bit processor co...

This paper introduces our Real-time Multiprocessor SoC intended for low power wireless applications as mobile ad hoc networks. The multiprocessor is based on eight of our 32bit S-CORE RISC processors.

Application of Sanger techniques to the analysis of the 3' terminal oligonucleotide from E. coli 32-P-labelled 16 S rRNA yields the sequence AUCACCUCCUUAOH. This sequence is identical in RNA isolated from two wild-type strains (MRE600 and E. coli B, SY106) and from a mutant strain (AB301/105) defective in RNase III. Data presented here explains the previous derivation of an incorrect sequence (...

Abstract— The strong demand for complex and high performance embedded system-on-chip (SoC) requires quick turn around design methodology and high performance cores. Thus, there is a clear need for new methodologies supporting efficient and fast design of these systems on complex platforms implementing both hardware and software modules. In this paper, we describe a novel scalable core-based (SC...