This paper describes the acceleration of an infrared automatic target recognition (IR ATR) application with a co-processor board that contains multiple eld programmable gate array (FPGA) chips. Template and pixel level parallelism is exploited in an FPGA design for the bottleneck portion of the application. The implementation of this design achieved a speedup of 21 compared to running on the ho...

In this paper, a real-time implementation of the Rössler chaotic system in a Field Programmable Gate Array (FPGA) is presented. At first, we use directly the VHDL language for the hardware description of the system, contrary to some previous works where the Xilinx system generator of MATLAB/SIMULINK is used to generate the VHDL code. Then, after a step of optimization, to reduce the resources o...

Performance evaluation and design space exploration from early specifications is still a time consuming, experience and technology dependant issue in the design process. However, evaluation of architectural alternatives at an early stage of the design process is important because the choices made have a critical impact on the system final characteristics (area, performances, power consumption, ...

Vibrating mechanical structure characterization is demonstrated using contactless techniques best suited for mobile and rotating equipments. Fast measurement rates are achieved using Field Programmable Gate Array (FPGA) devices as real-time digital signal processors. Two kinds of algorithms are implemented on FPGA and experimentally validated in the case of the vibrating tuning fork. A first ap...

This paper presents an efficient FPGA-based architecture of CFAR target detector for radar system based on the automatic censored cell averaging (ACCA) detector based on ordered data variability (ODV). The ACCA–ODV detector estimates the unknown background level by dynamically selecting a suitable set of ranked cells and applying successive hypothesis tests. The proposed detector does not requi...

New markets are emerging for the fast growing field-programmable gate array (FPGA) industry. Standard and fair benchmarking practices are necessary to evaluate FPGA systems and determine their potential to support target applications. This paper provides an extensive survey of FPGA benchmarks in both academia and industry.

This paper presents an adaptive neuro-fuzzy controller ANFIS (Adaptive Neuro-Fuzzy Inference System) for a bilateral teleoperation system based on FPGA (Field Programmable Gate Array). The proposed controller combines the learning capabilities of neural networks with the inference capabilities of fuzzy logic, to adapt with dynamic variations in master and slave robots and to guarantee good prac...

We propose to design and build the BEE2 multi-purpose computing platform, which will offer a general FPGA-based hardware architecture and software design methodology that target a range of real-time radio telescope signal processing applications, such as wide band spectrometer and large antenna array correlator, while providing drastic reduction in overall cost and design time.

We present Midas, an economical FPGA-based architecture simulator that allows rapid early design-space exploration of manycore systems. Midas models target-system timing and functionality separately, and it employs hostmultithreading for an efficient FPGA implementation. It is a high-throughput, cycle-accurate full-system simulator, capable of booting real operating systems. The Midas prototype...

Over the past decade, the steady growth rate of FPGA device capacities has enabled the development of multi-FPGA prototyping environments capable of implementing millions of logic gates. While software support for translating new user designs from gate and RTL-level netlists to FPGA bitstreams has improved steadily, little work has been done in developing techniques to support the translation o...