A new low power 33 GHz low noise amplifier (LNA) is proposed in a 0.18μm CMOS technology. It is composed of a single-stage cascode topology consisting of two Common-Gate (CG) amplifiers which provides gain requirements in high frequencies with very low power dissipation. The designed LNA achieves a power gain of 12 dB, IIP3 of -1dBm, and noise figure from 2.96-3.86 dB over the 3dB bandwidth fro...

The main criterion in investment decisions is to maximize the investors utility. Traditional capital asset pricing models cannot be used when asset returns do not follow a normal distribution. For this reason, we use capital asset pricing model with independent and identically asymmetric power distributed (CAPM-IIAPD) and capital asset pricing model with asymmetric independent and identically a...

a digital look-up table adaptive predistortion technique using a six-port receiver for power amplifier linearization is presented. the system is designed in ka-band for a dvb-s2 satellite link. we use a six-port receiver at the linearizationloop in place of classic heterodyne receivers. the six-port receiver is implemented by the use of passive microwavecircuits and detector diodes. this approa...

A VHF (30MHz-300MHz) band digitally programmable low noise amplifier (LNA) has been implemented with a 0.25um standard CMOS process for VHF CMMB mobile TV tuners. Utilizing a T-match input network, input matching of more than a decade bandwidth is achieved across all gain settings. Adopting the multiple gated technique, gain flatness enhancement and capacitor reuse etc., the proposed LNA demons...

Currently, in Threshold Public Key Systems key shares are generated uniformly and distributed in the same manner to every participant. We propose a new scheme, Asymmetric Key Distribution (AKD), in which one share server is provided with a larger, unequal chunk of the original secret key. Asymmetric Key Distribution is a unique scheme for generating and distributing unequal shares via a Trusted...

This paper deals with the design of low-power, highperformance, continuous-time filters. The proposed OTA architecture employs current-reuse differential difference amplifiers in order to produce more power efficient Gm-C filter solutions. To demonstrate this, a 6th order low-pass Butterworth filter was designed in 0.18 μm CMOS achieving a 65-MHz -3-dB frequency, an in-band input-referred third...