Limited energy consumption in multimedia requires very low power circuits. In this paper we focused on leakage current minimization in single static random access memory (SRAM) cell in 90nm complementary metal oxide semiconductor (CMOS) technology. The leakage current mainly consists of sub threshold leakage current and gate leakage current in 90nm CMOS technology. So minimizing the sub thresho...

In 2002 Jackson et al. [JKS02] asked whether AC circuits augmented with a threshold gate at the output can be efficiently learned from uniform random examples. We answer this question affirmatively by showing that such circuits have fairly strong Fourier concentration; hence the low-degree algorithm of Linial, Mansour and Nisan [LMN93] learns such circuits in sub-exponential time. Under a conje...

An analog system-on-chip for kernel-based pattern classification and sequence estimation is presented. State transition probabilities conditioned on input data are generated by an integrated support vector machine. Dot product based kernels and support vector coefficients are implemented in analog programmable floating gate translinear circuits, and probabilities are propagated and normalized u...

This paper presents a comprehensive review of the major state-of-the-art high-speed CMOS digital circuits. Focusing in particular on dynamic circuits such as conventional DOMINO, conditionalevaluation DOMINO and contention-free DOMINO. Also some high-performance non-dynamic (static) circuit techniques will be reviewed such as dual-threshold (DVT) circuits. The relative performance of these circ...

Power dissipation in high performance systems requires more expensive packaging. In this situation, low power VLSI design has assumed great importance as an active and rapidly developing field. As the density and operating speed of CMOS VLSI chip increases, power dissipation becomes more significant due to the leakage current when transistor is OFF. This can be observed in both combinational an...

Power consumption of Very Large Scale Integrated (VLSI) circuits has been growing at an alarmingly rapid rate. This increase in power consumption, coupled with the increasing demand for portable/hand-held electronics, has made power consumption a dominant concern in the design of VLSI circuits today. Traditionally dynamic (switching) power has dominated the total power consumption of VLSI circu...

Conventional leakage reduction techniques focus primarily on sub-threshold leakage mitigation, while neglecting the effect of gate leakage current. This work focuses on understanding gate leakage current and developing circuit techniques for total leakage minimization. We present an efficient technique for gate leakage of CMOS circuits. Input vector control and circuit reconfiguration technique...

This paper analyzes the difference between two techniques of power saving circuit design. As the number of transistors increases power consumption and the need for more power efficient products increases there is greater motivation to design circuits to fulfill these expectations. We will give a comparison between these two technologies using an adder as the basic circuit. We will compare the p...