Extreme events are a challenge to natural as well as manmade systems. For critical infrastructure like power grids, we need to understand their resilience against large disturbances. Recently, new measures of the resilience of dynamical systems have been developed in the complex system literature. Basin stability and survivability respectively assess the asymptotic and transient behavior of a s...

In this paper, we propose novel interface circuits using Dynamic Over-Driving (DOD) and Adaptive Sensing (AS) scheme for high speed and energyefficient interface on a chip. Our AS-receiver makes it possible to use very low swing because of its good noise immunity against the threshold voltage variations, and our DOD-driver reduces data transmission time even through heavy load capacitances. The...

BACKGROUND Persons with post-stroke hemiparesis usually walk slowly and asymmetrically. Stroke severity and functional walking status are commonly predicted by post-stroke walking speed. The mechanisms that limit walking speed, and by extension functional walking status, need to be understood to improve post-stroke rehabilitation methods. METHODS Three-dimensional forward dynamics walking sim...

In this paper a technique is proposed to reduce the power consumption in clock distribution networks. Power has become a major issue in most VLSI designs. Power distribution in VLSI differs from product to product. However it is interesting to note that clock system and logic part itself consume most of total chip power. In practise a large portion of clock distribution network (CDN)s and flip ...

A reduced clock-swing flip-flop (RCSFF) is proposed, which is composed of a reduced swing clock driver and a special flip-flop which embodies the leak current cutoff mechanism. The RCSFF can reduce the clock system power of a VLSI down to one-third compared to the conventional flip-flop. This power improvement is achieved through the reduced clock swing down to 1 V. The area and the delay of th...

With its excellent mechanical flexibility, low-cost and low-temperature processing, the solution processed organic field-effect transistor (OFET) is a promising platform technology for developing ubiquitous sensor applications in digital health, environment monitoring and Internet of Things. However, a contradiction between achieving low voltage operation and having stable performance severely ...

| We propose a new ipop con guration which saves about 60% of total clocking power using a half-swing clock. To use the half-swing clock, level converters or special clock drivers are traditionally required and the power consumptions of these logic cannot be ignored. In the proposed scheme, only NMOSes are clocked with half-swing clock in order to make it operate without the level converter or ...

We propose a new flip-flop configuration which saves about 60% of total clocking power using a half-swing clock. To use the half-swing clock, level converters or special clock drivers are traditionally required and the power consumptions of these logic cannot be ignored. In the proposed scheme, only NMOSes are clocked with half-swing clock in order to make it operate without the level converter...

iii The portable communications industry's vision of integrating a complete multimedia complex on a single die, coupled with the desktop computing industry's vision of integrating multimedia functionality into general-purpose microprocessors has transformed lowering the power dissipation of digital signal processing (DSP) datapath circuits into an increasingly important challenge in current and...

Low power, high-speed bus architectures, based on low swing voltage technique, using multithreshold voltage transistors are proposed in this paper. Three different classes of driver/repeater/receiver circuits are introduced. The driver circuits are comprised of high threshold voltage MOSFET transistors, in order to reduce their output swing level voltage. For re-pulling up the low swing voltage...