This paper describes an implementation of a bandpass sigma-delta modulator behavioral model with SIMPLORER VHDL-AMS. The model includes most of the non-idealities which affect the performance of the component, such as sampling jitter, kT/C noise and operational amplifier parameters. A comparison with another model, implemented with MATLABSIMULINK by Brigati et al., is made to highlight and val...

An efficient means for constructing a narrow bandpass filter for an analogto-digital converter based on a bandpass sigma-delta modulator is presented. It is shown that the filter can be made with very simple hardware, comparable to that required by an analog-to-digital converter using standard lowpass sigma-delta modulation. Introduction Bandpass sigma-delta modulation [1] is a variant of the m...

In recent years, the research toward the development of high speed and high resolution analog-to-digital converters (ADCs) has been equally driven by the demand of high-speed wire line and wireless communication services. Delta-Sigma ADCs are widely used in wireless applications due to their oversampling and noise shaping characteristics. This thesis aims to design a continuous-time sigma-delta...

This paper presents the design and simulations results of a switched-capacitor discrete time Second order Sigma-Delta modulator used for a resolution of 14 bits Sigma-Delta analog to digital converter. The use of operational amplifier is necessary for low power consumption, it is designed to provide large bandwidth and moderate DC gain. With 0.35μm CMOS technology, the ΣΔ modulator achieves 86 ...

A behavioral model of a second order switchedcapacitor Sigma-Delta modulator is presented. The purpose of this work is the presentation of a behavioral model of a second order switched capacitor ΣΔ modulator considering (Error due to Clock Jitter, Thermal noise Amplifier Noise, Amplifier Slew-Rate, Non linearity of amplifiers, Gain error, Charge Injection, Clock Feedthrough, and Nonlinear on-re...

This paper presents the design of a low power second-order continuous-time sigma-delta modulator for low power applications. The loop filter of this modulator has been implemented based on the nonlinear transconductance-capacitor (Gm-C) by employing current-mode technique. The nonlinear transconductance uses floating gate MOS (FG-MOS) transistors that operate in weak inversion region. The propo...

This paper explains the design of two stage operational amplifier, single bit comparator and D flipflop best suited for the fifth order continuous-time sigma-delta modulator. A fifth order continuous time sigma delta modulator is chosen for 40MHz Signal Bandwidth with an nyquist frequency of 150MHz. Two stage opamp is used to provide the high gain to the modulator. A single quantizer is used to...

Single-bit second-order delta-sigma modulators are commonly used in high-resolution ADCs. Testing this type of modulator requires a high-resolution test stimulus, which is difficult to generate. This paper proposes a novel and robust technique to determine the performance of the modulator, which incorporates simple design-for-testability circuitry. This technique requires only digital stimulus ...

A method for improving the signal-to-noise ratio (SNR) of sigma–delta modulators with one-bit quantization is presented. The two-level feedback signal of a standard sigma–delta modulator is replaced by a multilevel signal, which is a superposition of two parts. One part ( ) represents a rough estimate of the instantaneous amplitude of the input signal (prediction signal), and the other ( ) is t...