Reconfigurable computing is becoming increasingly attractive for many applications. This survey covers two aspects of reconfigurable computing: architectures and design methods. The paper includes recent advances in reconfigurable architectures, such as the Alters Stratix II and Xilinx Virtex 4 FPGA devices. The authors identify major trends in general-purpose and specialpurpose design methods....

A novel reconfigurable hybrid single electron transistor/MOSFET (SETMOS) circuit architecture, namely, reconfigurable pseudo-NMOS-like logic is proposed. Based on the hybrid SETMOS inverter/buffer circuit cell, reconfigurable pseudo-NMOS-like logics that can work normally at room temperature are constructed. This kind of reconfigurable logic can implement up to 2n sorts of functions at n inputs...

Hardward/software (HW/SW) codesign and reconfigurable computing are commonly used methodologies for digitalsystems design. However, no previous work has been carried out in order to define a HW/SW codesign methodology with dynamic scheduling for run-time reconfigurable architectures. In addition, all previous approaches to reconfigurable computing multicontext scheduling are based on static-sch...

Reconfigurable antennas have attracted a lot of attention especially in future wireless communication systems. Superior features such as reconfigurable capability, low cost, multi-purpose functions and size miniaturization have given reconfigurable antennas advantage to be integrated into a wireless systems. In this chapter, two types of reconfigurable antennas are discussed. First, frequency r...

The advantages of the reconfigurable technology in terms of performance have been widely recognized. However, programming reconfigurable systems and designing hardware accelerators for them is not a trivial task. The Molen paradigm provides an easy to use approach to couple a General Purpose Processor (GPP) with custom designed reconfigurable accelerators both at program level and at hardware d...

Reconfigurable hardware is emerging as the best option for the efficient implementation of complex and computationally expensive signal processing algorithms. Reconfigurable hardware exploits the benefit of high of computational efficiency of hardware as well as flexibility of software implementation. Field Programmable Gate Array (FPGA) which finds wide range of applications in the field of si...

In this paper, we propose a hardware/software partitioning method for improving applications’ performance in embedded systems. Critical software parts are accelerated on hardware of a single-chip generic system comprised by an embedded processor and coarse-grain reconfigurable hardware. The reconfigurable hardware is realized by a 2-Dimensional array of Processing Elements. A list-based mapping...

Dynamically reconfigurable systems demand complicated run-time management. Due to resource constraints and reconfiguration latencies, efficient reconfiguration strategies that can reduce the overhead cost of dynamic reconfiguration need to be studied. In this paper, we i) propose a reconfigurable task model which extends the classical real-time task model to support the additional states and la...

Dynamically Reconfigurable Field Programmable Gate Arrays (DR FPGAs) change many of the basic assumptions of what hardware is. DR FPGA-based dynamically reconfigurable computing has become a powerful methodology for achieving high performance while minimizing the resource required in the implementation of many applications. The key to harnessing the power of DR FPGAs for most applications is to...

In this paper, a novel reconfigurable discrete wavelet transform architecture is proposed to meet the diverse computing requirements of advanced multimedia systems. The proposed architecture mainly consists of reconfigurable processing element array and reconfigurable address generator, featuring dynamically reconfigurable capability where the wavelet filter kernels and wavelet decomposition st...