Interconnection topology inside chip multiprocessor acts as fundamental role in communication locality. Considering compiler optimization data locality has been an inmost hypothesis in the high performance computing. Conversely, data locality sphere has several troubles when its degree of dimension is two or higher. In mesh network of two dimensions, each core is connected with its four neighbo...

Parallel processing is an efficient form of information processing system, which emphasizes the exploitation of concurrent events in the computing process. To achieve parallel processing it’s required to develop more capable and costeffective systems. In order to operate more efficiently a network is required to handle large amount of traffic. Multi-stage Interconnection Network plays a vital r...

A number of experiments regarding the placement of instructions, private data and shared data in the Non-Uniform Memory Access multiprocessor, RP3 has been performed. Three Scientific/Mathematical workloads have been used in the experiments, and the results have been modelled in a simple performance model which takes linear contention into consideration. The results indicate that it can very we...

Scalability and Complexity are crucial performance parameters in the design of Interconnection networks for multiprocessor system. This paper proposed and analyzed a new scalable interconnection network topology named as Linear Crossed Cube (LCQ). LCQ designed is based on the principle of hypercube architecture however, it improves some of the drawbacks of hypercube such as complex extensibilit...

Mass data processing and complex problem solving have higher and higher demands for performance of multiprocessor systems. Many multiprocessor systems have interconnection networks (networks for short) as underlying topologies and a network is usually represented by a graph where nodes represent processors and links represent communication links between processors. The network determines the pe...

In vector multiprocessor systems, collisions in the interconnection network and conflicts in the memory modules are the main causes of the performance degradation. In this work we use a synchronized interconnection network, and propose an interleaved storage scheme and an out-of-order access to the elements of the stream that allow conflict-free access. The streams are generated by the differen...

Single bus multiprocessor systems do not scale well due to the limited bandwidth of the bus. Hierarchical bus interconnections are scalable, but unfortunately the top level bus becomes a bottleneck for larger systems. In this paper we present a novel interconnection network called the Multistage Bus Network(MBN). The MBN consists of multiple stages of buses and it preserves the bandwidth proper...

Interconnection network organization has a signiicant impact on multiprocessor system performance. However, detailed and comprehensive studies of the performance and the eeect of diierent organizations are virtually non-existent. In this study, three interconnection network organizations are evaluated as part of a cache-based shared memory multiprocessor system: tori, multistage and single-stag...