Non Uniform Cache Architectures (NUCA) are a novel design paradigm for large last-level on-chip caches which have been introduced to deliver low access latencies in wire-delay dominated environments. Typically, NUCA caches make use of a network-on-chip (NoC) to connect the different sub-banks and the cache controller. This work analyzes how different network parameters, namely hop latency and b...

SoC communication infrastructures, such as the Æthereal network on chip (NoC), will play a central role in integrating IPs with diverse communication requirements. To achieve a compositional and predictable system design, it is essential to reduce uncertainties in the interconnect, such as throughput and latency. In our NoC, these uncertainties are eliminated by providing guaranteed throughput ...

Nowadays lots of processing elements should be placed on a single chip because of ever complexity of applications. In order to connect this number of processing elements, providing a interconnection infrastructure is essential. Network on Chip (NoC) is used as an efficient architecture for chip multiprocessors, which brings a reasonable performance and high scalability. A relevant challenge in ...

The vast majority of today’s Internet traffic uses TCP connections whose lengths range from a few packets to many orders of magnitude more. Even though short flows are prevalent in web traffic and their completion time can directly impact user experience, these flows are generally not prioritized and can experience drops because of the load caused by longer TCP flows on routers. In this paper, ...

Abstract The needs of the chip are growing on a daily basis as extremely large size integrated circuits evolve fast. As result, network-on-chip (NoC) was suggested and successfully developed to address issue communication on-chip. Current research focuses NoC topology routing algorithms that have substantial influence network performance. Because low power is priority, Mesh-of-Tree (MoT) archit...

Networks-on-chip (NoCs) have become increasingly widespread in recent years due to the extensive integration of many components in modern multicore processors and SoC designs. One of the fundamental tradeoffs in NoC design is the radix of its constituent routers. While high radix routers enable a richly connected and low diameter network, low radix routers provide simple and low power designs. ...

Packet scheduling algorithms in switches and routers will likely play a critical role in providing the Quality-of-Service (QoS) guarantees required by many real-time multimedia applications. Elastic Round Robin (ERR), a recently proposed fair scheduling discipline designed for best-effort traf®c, is very ef®cient with an O(1) dequeuing complexity and, in addition, has better fairness characteri...

Tor is a widely used low-latency anonymity system. It allows users of web browsers, chat clients, and other common low-latency applications to communicate anonymously online by routing their connection through a circuit of three Tor routers. However, Tor is commonly assumed to be vulnerable to a wide variety of attacks, which might allow Tor operators or outside observers to compromise the anon...

Overlay networks are virtual networks formed by cooperating nodes that share an underlying physical network. They represent a flexible and deployable approach for applications to obtain new network semantics without modification of the underlying network, but they suffer from efficiency concerns. This thesis presents two new primitives for implementation in the network layer (i.e., the routers ...