We consider the security of the Bennett-Brassard 1984 protocol for quantum key distribution, with arbitrary individual imperfections simultaneously in the source and detectors. We provide the secure key generation rate and show that three parameters must be bounded to ensure security; the basis dependence of the source, a detector-blinding parameter, and a detector leakage parameter. The system...

Scaling and power reduction trends in future technologies will cause subthreshold leakage currents to become an increasingly large component of total power dissipation. As a result, new techniques are needed in order to provide high performance and low power circuit operation. This dissertation develops new circuit techniques that exploit dual threshold voltages and body biasing in order to red...

Prevailing CMOS design practice has been very conservative with regard t o choice of transistor threshold voltage, so as t o avoid the difficult problems of threshold variations and high leakage currclnts. I t is becoming necessary t o scale threshold voltages more aggress~vely in order t o obtain further power reduction, performance improven~ent, and integration density. Substantial leakage re...

For sub-100 nm CMOS technologies, leakage power forms a significant component of the total power dissipation, especially due to within-die and die-to-die variations in process (P), temperature (T) and supply voltage (V). Since leakage power and operating temperature are electrothermally coupled to each other, increasing power dissipation and thermal problems are becoming key concerns not only f...

In this paper, we present an accurate approach for the estimation of statistical distribution of leakage power consumption in the presence of process variations in nano-scale CMOS technologies. The technique, which is additive with respect to the individual gate leakage values, employs Generalized Extreme Value (GEV) distribution. Compared to the previous methods based on (two-parameter) lognor...

This paper propose a new circuit design which monitor total leakage current during standby mode and generates the optimal reverse body bias voltage, by using the adaptive body bias (ABB) technique to compensate die-to-die parameter variations. Design details of power monitor are examined using simulation framework in 65nm and 32nm BTPM model CMOS process. Experimental results show the overhead ...

Speed, power consumption and area, are some of the most important factors of concern in modern day memory design. As we move towards Deep Sub-Micron Technologies, the problems of leakage current, noise and cell stability due to physical parameter variation becomes more pronounced. In this paper we have designed an 8T Read Decoupled Dual Port SRAM Cell with Dual Threshold Voltage and characteriz...

In present scenario high speed and low power devices in signal processing system is generally needed the efficient design and reduced complexity of converters, therefore conventional flash ADC is not fully meet the required specifications. ADC with high speed and low resolution is required in present communication technologies. Lower leakage current with low power consumption is considerable ef...

introduction: the provision of an effective apical seal is an essential factor when choosing an appropriate material for success of root-end surgeries. root-end resection, preparation and obturation should provide an adequate apical seal. the aim of this in vitro study was to investigate bacterial and dye microleakage of four different root-end filling materials and compare the efficacy of thes...