This paper presents a hardware implementation to solve the graph coloring problem (chromatic number ) for arbitrary graphs using the hopfield neural network model of computation. The graph coloring problem, an NP-hard problem, has important applications in many areas including time tabling and scheduling, frequency assignment, and register allocation. The proposed algorithm has a time complexit...

job shop scheduling problem has significant importance in many researchingfields such as production management and programming and also combinedoptimizing. job shop scheduling problem includes two sub-problems: machineassignment and sequence operation performing. in this paper combination ofparticle swarm optimization algorithm (pso) and gravitational search algorithm(gsa) have been presented f...

This paper presents a scheduling technique used to optimize computation speed of loops running on architectures that may include pipelined dedicated processors. The problem under consideration is to find an optimal periodic schedule satisfying the timing constraints. Motivated by FPGA (Field-Programmable Gate Array) architecture we formulate a problem of cyclic scheduling on one dedicated proce...

in this paper a new problem of three stage disassembly-assembly scheduling is introduced and reviewed. this problem, which was arisen from the aviation industry characteristics, is a generalization of the two stage assembly scheduling problem. products (helicopters) in the aviation industry return to assembler for annual overhaul repair services. in the first stage helicopters are disassembled ...

 This paper considers a bi-objective scheduling problem in a flexible manufacturing cell (FMC) which minimizes the maximum completion time (i.e., makespan) and maximum tardiness simultaneously. A new mathematical model is considered to reflect all aspect of the manufacturing cell. This type of scheduling problem is known to be NP-hard. To cope with the complexity of such a hard problem, a genet...

As the effort to scale up existing quantum hardware proceeds, the necessity of effective methods to schedule quantum gates and minimize the number of operations becomes more compelling. Three are the constraints that have to be taken into account: The order or dependency of the quantum gates in the specific algorithm, the fact that any qubit may be involved in at most one gate at a time, and th...

This paper presents a novel mixed-integer programming formulation for scheduling non-preemptive, aperiodic, hard real-time tasks with precedence constraints. It provides an integrated partitioning and scheduling co-synthesis approach. The problem formulation maps some n precedence-related, indivisible jobs having specified processing requirements, release times, and due-dates to a system involv...

In a hardware emulator consisting of multiple fieldprogrammable gate arrays (FPGA’s), the utilization of the FPGA logic resource is usually very low due to the limitation on the number of I/O pins. Virtual wire technology not only increases the inter-FPGA communication capability, but it also increases the logic resource utilization by means of time division multiplexing (TDM). TDM allows one p...

In this paper, we present a multi-gate mesh network architecture that has been developed to ensure high performance and reliability under emergency conditions when a system expects to receive power outage notifications and exchanges. In order to handle the metering traffic, under time varying outage conditions we introduce a multi-gate and single-class back-pressure based scheduling algorithm, ...