This paper proposes an architecture of dynamically reconfigurable arithmetic circuit. Dynamic reconfiguration is a technique to realize required functions by changing hardware construction during operations. The proposed circuit is based on a complex number multiply-accumulation circuit which is used frequently in the field of digital signal processing. In addition, the proposed circuit perform...

New true-single-phase-clocking (TSPC) BiCMOS/ BiNMOS/BiPMOS dynamic logic circuits and BiCMOS/BiNMOS dynamic latch logic circuits for high-speed dynamic pipelined system applications are proposed and analyzed. In the proposed circuits, the bootstrapping technique is utilized to achieve fast near-full-swing operation. The circuit performance of the proposed new dynamic logic circuits and dynamic...

Electric and hybrid electric vehicles are attractive candidates for sustainable transportation due to its higher efficiency and low emission. The critical choice on the electric motors is its capability of motoring and regenerative braking characteristics. Switched reluctance machines are viable candidate as with proper control and extended constant power range operation replacing the multi-gea...

This paper presents a comprehensive case study on electro-mechanical analysis of MEMS[1] variable capacitors. Using the fundamental mechanical and electrical equations, static and dynamic behaviors of the device are studied. The analysis is done for three different modes, namely: dc (static mode), small signal ac and large signal regime. A complete set of equations defining dynamic behavior of ...

This article proposes a current-mode square-rooting circuit using current follower transconductance amplifier (CTFA). The amplitude of the output current can be electronically controlled via input bias current with wide input dynamic range. The proposed circuit consists of only single CFTA. Without any matching conditions and external passive elements, the circuit is then appropriate for an IC ...

This paper presents a novel current mode four quadrant multiplier. A pair of sub threshold translinear loops and current conveyors are the basic building blocks in realization scheme. The proposed multiplier features simplicity, low power dissipation. The salient features of this approach are; it‟s single ended inputs; since it uses sub threshold region of operation, this make the design intere...