When the application context is ready to accept different levels of exactness in solutions and supported by human perception quality, then term ‘Approximate Computing’ tossed before one decade will become first priority . Even though computer hardware software are working generate exact results, approximate results preferred whenever an error predefined bound adaptive. It reduce power demand cr...

In this paper we make progress on establishing a tight connection between the problem of derandomization of arithmetic circuit identity testing (ACIT), and the arithmetic circuit complexity of the permanent defined by pern = ∑ σ∈Sn ∏n i=1 xiσ(i). We develop an ACIT-based derandomization hypothesis, and show this is a necessary condition for proving that permanent has super-polynomial arithmetic...

Adders and multipliers are two main units of the computer arithmetic processors and play an important role in reversible computations. The binary multiplier consists of two main parts, the partial products generation circuit (PPGC) and the reversible parallel adders (RPA). This paper introduces a novel reversible 4×4 multiplier circuit that is based on an advanced PPGC with Peres gates only. Ag...

In the recent year, many other new circuits are proposed using less number of transistors with less delay and extremely low power requirement. An adder consisting with less transistors don't give full swing outputs for all input combinations and there is difference in output level for various combinations and these circuits have very low driving capabilities. other circuits also are proposed in...

In the present investigation, we developed a novel Feistel cipher by dividing the plaintext into a pair of matrices. In the process of encryption, we have used a bunch of keys and modular arithmetic addition. The avalanche effect shows that the cipher is a strong one. The cryptanalysis carried out on this cipher indicates that this cipher cannot be broken by any cryptanalytic attack and it can ...

This paper focuses on detecting arithmetic components in large gate-level circuits using cut enumeration and structural analysis. It is based on the assumption that adder trees, the key part of arithmetic components, are represented using halfand full-adders, whose boundaries can be traced down to individual nodes present in the gatelevel circuit structure. The proposed method detects the eleme...

In general, Constraint Optimization Problems (COP) are NP-hard. Using variable elimination techniques [5, 13] COPs can be solved with computation that is exponential only in the induced-width of the constraint graph (given some order on the nodes), i.e. smaller than n. Orders on nodes allowing for some parallelism are offered by Depth First Search (DFS) trees of the constraint graph [3, 13]. An...

The Formal Synthesis methodology can be considered as the application of the transformational approach to circuit synthesis by logical transformations performed in a theorem prover. Additionally to the implementation of the circuit, the proof that the result is a correct implementation of a given specification is obtained automatically. In this paper, a higher-order formalisation for the arithm...

An arithmetic circuit is a directed acyclic graph in which the operations are {+,×}. In this paper, we exhibit several connections between learning algorithms for arithmetic circuits and other problems. In particular, we show that: • Efficient learning algorithms for arithmetic circuit classes imply explicit exponential lower bounds. • General circuits and formulas can be learned efficiently wi...

We explore the use of subfield arithmetic for efficient implementations of Galois Field arithmetic especially in the context of the Rijndael block cipher. Our technique involves mapping field elements to a composite field representation. We describe how to select a representation which minimizes the computation cost of the relevant arithmetic, taking into account the cost of the mapping as well...