This paper presents a new control method for simultaneous compensation of instantaneous reactive power and current harmonics by parallel active filters (PAFs). Reference compensating currents of PAF are calculated using the subtraction of instantaneous power from its average value. In this way, it is possible omitting high/low pass filter(s) from the control circuit of PAF, which usually result...

design and optimization of a single crystalline silicon (c-si) solar cell is performed to achieve the maximum light conversion efficiency. various parameters such as doping concentration and thicknesses, and geometrical dimension of surface pyramids are studied. the inverted surface pyramid is used to increase the efficiency of the solar cell, and engineered oxide layer is used as the passivati...

in this paper a novel design of all-optical half-subtractor based on nonlinear directional coupler is proposed. by using four waveguides and appropriately adjusting the refractive indices and selecting the proper length of waveguides, halfsubtractor function can be obtained. the operation of this function is simulated by rsoft cad-layout (beamprop) simulator. the simulation results confirm the ...

The Full Adders (FAs) constitute the essential elements of digital systems, in a sense that they affect the circuit parameters of such systems. With respect to the MOSFET restrictions, its replacement by new devices and technologies is inevitable. QCA is one of the accomplishments in nanotechnology nominated as the candidate for MOSFET replacement. In this article 4 new layouts are presente...

due to the expected increase of defects in circuits based on deep submicron technologies, reliability has become an important design criterion. although different approaches have been developed to estimate reliability in digital circuits and some measuring concepts have been separately presented to reveal the quality of analog circuit reliability in the literature, there is a gap to estimate re...

In this paper, a new circuit scheme is proposed to reduce the power consumption of dynamic circuits. In the proposed circuit, an NMOS keeper transistor is used to maintain the voltage level in the output node against charge sharing, leakage current and noise sources. Using the proposed keeper scheme, the voltage swing on the dynamic node is lowered to reduce the power consumption of wide fan-in...