We consider the buffer content of a fluid queue or storage process. The buffer content varies in a way that depends on the state of an underlying three-state Markov process. In state 0 the buffer content increases at a rate α(x) that is a function of the current buffer level x; in states 1 and 2 it decreases linearly, with different speeds. We study the steady-state buffer content, by using lev...

The MOS switch with bootstrapped technique is widely used in low-voltage switched-capacitor circuit. The switched-capacitor circuit with the bootstrapped technique could be a dangerous design approach in the nano-scale CMOS process due to the gate-oxide transient overstress. The impact of gate-oxide transient overstress on MOS switch in switchedcapacitor circuit is investigated in this work wit...

In this paper a new compact CMOS class AB buffer is presented. Its simple implementation relies on the use of the Flipped Voltage Follower (FVF) [ I ] . Simulation results from a 0.35 pm CMOS technology are presented that prove the operating principle under low-power conditions. This buffer can also find application in testing of analog CMOS VLSI circuits, as the input capacitance can be very l...

This paper proposes a module of a high gain and high swing 2-stage amplifier. It is suitable for building a general operational amplifier in a modular fashion with various optional performances. The proposed module alone offers opened-loop voltage gain up to 124 dB and GBW of 10 MHz without loading conditions. To assemble a 124 dB voltage gain operational amplifier with load driving capacity of...

offset voltage for 1 nF load capacitance with a supply voltage of 3.3 V. The settling time is only 1.62 μs even the load capacitance is up to 5 nF.

A qualitative analysis of different parameters such as Phase noise, Slew rate and tranconductance by using power gating reduction technique is presented. The circuit achieves the large driving capability by employing simple comparators to sense the transients of the input to turn on the output stages, which are statically off in the stable state. The effect of the different number of transistor...

It is introduced a new genetic algorithm to synthesize the negative-type second generation current conveyor (CCII-) by superimposing a voltage follower (VF) with a current follower (CF). First, the VF and CF are described by binary genes. Second, the gene CF is inverted, rigth-shifted and multiplied (AND operation) with the gene VF to verify that both genes can be superimposed to synthesize the...

A new high performance second-generation CMOS current conveyor architecture is presented. It is built using a differential flipped voltage follower as its input buffer stage and a cascode current mirror as output stage. It is characterized by very low output impedance. It provides gain independent high bandwidth when used to implement a programmable gain voltage amplifier. Simulation and experi...

NIST is implementing the Josephson arbitrary waveform synthesizer as an ac Josephson Voltage Standard (ACJVS). Over the past few years we have demonstrated precise measurements of synthesized sine waves at rms voltage amplitudes up to 170 mV. The system can generate a variety of precision voltage outputs including dc voltages and ac sinewaves, so it can be used as a quantum-based voltage source...

Operational amplifier stability compensation methods for capacitive loading applied to TS507 Introduction Who has never experienced oscillations issues when using an operational amplifier? Op-amps are often used in a simple voltage follower configuration. However, this is not the best configuration in terms of capacitive loading and potential risk of oscillations. Capacitive loads have a big im...