An Early Completion technique is developed to significantly increase the throughput of NULL Convention self-timed digital systems without impacting latency or compromising their self-timed nature. Early Completion performs the completion detection for registration stagei at the input of the register, instead of at the output of the register, as in standard NULL Convention Logic. This method req...

Abstract. In this paper we present an original neighborhood mechanism for WTM self-organizing Kohonen map implemented in CMOS 0.18 μm process. Proposed mechanism is an asynchronous circuit and does not require controlling clock generator. Propagation of an enable signal from a winning neuron to neurons that belong to the winner’s neighborhood is very fast. For example radius (R) of the neighbor...

This work introduces a novel methodology that eases the synchronous to asynchronous conversion of existing digital circuits. Synchronous singlephased circuits may have its performance improved with the use of a variable rate clock generator if the conversion is done on some key circuits. This methodology is used to improve the performance of a soft-core implementation ofthe Blowfish cryptograph...

Practical issues in the design of power clock generators needed by adiabatic logic circuits are explained. Synchronous and asynchronous power clock generators are designed for an 8-bit adiabatic carry look-ahead adder and the more energy efficient circuit for the power clock generation is determined to be the 2N synchronous power clock generator that exhibits conversion efficiency of 77% at 1 o...

Synchronous MPSoCs are widespread today, but the evolution of technology into the deep submicron domain leads to increasingly complex timing closure problems. One natural solution to these is to resort to the globally asynchronous, locally synchronous (GALS) paradigm. This work proposes a novel architecture for clock generators to support GALS systems. The generator can drive individual modules...

A resonant sliding mode control strategy based on the film surface is proposed to turbine-side converter of wind turbine so that can be connected grid smoothly under condition unbalanced voltage. Taking doubly-fed asynchronous generator working voltage as object, establish its mathematical model and generator-side converter. instantaneous power in ? ? static coordinate system state variable con...

Received Sep 19, 2017 Revised Oct 27, 2017 Accepted Nov 11, 2017 This paper present steady state and dynamic (Transient) models of the doubly fed induction generator connected to grid. The steady state model of the DFIAG (Doubly Fed Asynchronous induction Generator) has been constructed by referring all the rotor quantities to stator side. With the help of MATLAB programming simulation results ...

This paper focuses on prototyping pausible and gated In this paper, after presenting an overview on the pausible clock based GALS systems on commercial FPGAs. Pausible clock clock based and gated clock based GALS systems in sections II based GLAS systems use an on-chip clock generator to generate and III, the implementation of GALS on commercial FPGA pausible clock pulses whereas gated clock ba...

The paper presents a comparative study regarding the control (using an adaptive neuro-fuzzy controller and a PD controller) based on the simulation of wind energy conversion systems functioning. There are considered several simulations based on asynchronous generator usage, by using the dedicated MATLAB-PSB (Power System Blockset) toolbox implementations.

A battery Energy storage system (BESS) based voltage and frequency controller (VFC), for an Autonomous Asynchronous Generator (ASG) driven by an uncontrolled pico hydro turbine used in constant power mode, is presented in this paper. Excitation of the asynchronous generator with capacitor bank enables it to generate rated voltage at no load. The additional reactive power demand of the ASG on lo...