quantum dot cellular automata (qca) is one of the important nano-level technologies for implementation of both combinational and sequential systems. qca have the potential to achieve low power dissipation and operate high speed at thz frequencies. however large probability of occurrence fabrication defects in qca, is a fundamental challenge to use this emerging technology. because of these vari...

This paper presents a new design for 14 transistor single bit full adder, implemented using five transistor XNOR/XOR cell and transmission gate multiplexer. For transmission gate multiplexer complementary gate control signals are required and in 14 transistor full Adder both XOR and XNOR signals are generated. XNOR/XOR cell shows high power consumption than single XNOR gate. So, 8 transistor fu...

In this paper we propose new three-input XOR and three-input XNOR gate based on generalized threshold gate (GTG) topology. The GTG topology is main part is monostable-bistable logic element (MOBILE). The proposed gates use fewer elements count in comparison with other implementations which utilize MOBILE as a main structure. By exploiting the new three-input XOR gate and a carry generator, we p...

The paper proposes the novel design of a 3T XOR gate combining complementary CMOS with pass transistor logic. The design has been compared with earlier proposed 4T and 6T XOR gates and a significant improvement in silicon area and power-delay product has been obtained. An eight transistor full adder has been designed using the proposed three-transistor XOR gate and its performance has been inve...

The paper proposes a novel design of two transistor (2T) XOR gate and its application to design an 8 bit x 8 bit multiplier. The design explores the essence of suitably biasing the MOS transistor and engineering the threshold voltage of the MOS transistor through appropriate biasing and device geometry. Using the 2T XOR gates, a full adder has been realised. Detailed simulations have been carri...

The well-known classical constructions of garbled circuits use four ciphertexts per gate, although various methods have been proposed to reduce this cost. The best previously known methods for optimizing AND gates (two ciphertexts; Pinkas et al., ASIACRYPT 2009) and XOR gates (zero ciphertexts; Kolesnikov & Schneider, ICALP 2008) were incompatible, so most implementations used the best known me...

Exclusive-OR (XOR) operation plays an important role in the hardware implementation of many cryptographic algorithms. Since the hardware implementation of XOR gate is vulnerable to side channel analysis such as power analysis attacks, efficient countermeasures are required. The existing approaches provide countermeasures by placing more number of transistors at key locations in the gate impleme...

Polymorphic digital circuits are circuits composed of polymorphic (multifunctional) as well as ordinary gates. In addition to its standard logic function (such as NAND), a polymorphic gate exhibits another logic function which is activated under a specific condition, for example, when Vdd, temperature, illumination or a special signal reaches a certain level. This paper describes newly proposed...

We consider a realization of the XOR logic gate in a process biocatalyzed by an enzyme which can be inhibited by a substrate when the latter is inputted at large enough concentrations. A model is developed for describing such systems in an approach suitable for evaluation of the analog noise amplification properties of the gate. The obtained data are fitted for gate quality evaluation within th...