Wider buses require more interconnect resources and packaging pins, and the.IOSR Journal of VLSI and Signal Processing IOSRJVSP. H.Bakoglu Circuits, Interconnections and Packaging for VLSI Addison-Wesley publishing.Most logic circuits are known to exhibit q0-6 whereas, for instance, neural. B, 1990, Circuits, Interconnections and Packaging for VLSI.The growth of VLSI circuits is largely depende...

In small-size Complementary Metal Oxide Semiconductor (CMOS) technology, the size of Very Large-Scale Integration (VLSI) below 90nm becomes higher and due to enhancement short channel effect transistors. CMOS Buffer is a very common circuit unit in VLSI. this paper, Pileup transistor (PET) proposed reduce subthreshold leakage current buffer. The main principle PET technology voltage difference ...

computation of the second order delay in rc-tree based circuits is important during the design process of modern vlsi systems with respect to having tree structure circuits. calculation of the second and higher order moments is possible in tree based networks. because of the closed form solution, computation speed and the ease of using the performance optimization in vlsi design methods such as...