Wireless sensor network have several constraints, such as a short transmission range, poor processing capabilities, limited available power and slow execution time. The design of algorithms for fast processing of information in sensor network is an emerging research area nowadays. However, due to unique characteristics of the sensor network computing paradigm, the objective is to design algorit...

In this paper, a high speed and low power 16x16 Vedic Multiplier is designed by using low power and high speed modified carry select adder. Modified Carry Select Adder employs a newly incremented circuit in the intermediate stages of the Carry Select Adder (CSA) which is known to be the fastest adder among the conventional adder structures. A Novel technique for digit multiplication namely Vedi...

We show the universality of the VEDIC network in simulating other well known interconnection networks b y generating the parameters of the VEDtC network automatically. Algorithms are given to represent chordal rings, toroidal meshes, binary hypercubes, kary n-cubes, and Cayley graphs star graph and pancake graph, as VEDIC networks. Using these parameters the VEDIC network can be used as a tool ...

In this paper, a high speed squaring circuit for binary numbers is proposed. High speed Vedic multiplier is used for design of the proposed squaring circuit. The key to our success is that only one Vedic multiplier is used instead of four multipliers reported in the literature. In addition, one squaring circuit is used twice. Our proposed Squaring Circuit seems to have better performance in ter...

Vedic literature contains knowledge about all fields of human endeavor, from physics and psychology to medicine, art and aeronautics (Goswami, 1977). Empirical validation of the Vedas could therefore open storehouses of knowledge in many areas. According to the Vedas, all material elements are infused with the modes of nature, or gunas-sattva, rajas and tamas. Dasgupta (1961) describes the guna...

Abstract: This article deals with architecture, temple design, and art in ancient India and also with continuity between Harappan and historical art and writing. It fills in the gap in the post-Harappan, pre-Buddhist art of India by calling attention to the structures of northwest India (c. 2000 BC) that are reminiscent of late-Vedic themes, and by showing that there is preponderant evidence in...

‘Veda’ means knowledge. Since we call our earliest period Vedic, this is suggestive of the importance of knowledge and science, as a means of acquiring that knowledge, to that period of Indian history. For quite some time scholars believed that this knowledge amounted to no more than speculations regarding the self; this is what we are still told in some schoolbook accounts. New insights in arc...

Digital multipliers are most widely used component in applications such as convolution, Fourier transform, discrete cosine transforms, and digital filtering. Because outturn of these applications mainly depends on multiplier speed, therefore multipliers must be designed efficiently. In the proposed architecture, a variable-latency multiplier design with novel AHL architecture and a razor flip f...

This paper proposes a method for area efficient fractional fixed point(Q-format) multiplier based on Urdhava Tiryakbhyam of vedic mathematics. Even though conventional or normal Urdhava multipliers carries high speed mathematical operations, they consume more chip area. Hence we proposed a pipelined multiplier architecture in this paper which consumes less chip area. The pipelined multiplier ar...