This study investigates geometrical variability on the sensitivity of the junctionless tunneling field effect transistor (JLTFET) and Heterostructure JLTFET (HJLTFET) performance. We consider the transistor gate dielectric thickness as one of the main variation sources. The impacts of variations on the analog and digital performance of the devices are calculated by using computer aided design (...

This work studies the effects of dynamic threshold design techniques on the speed and power of digital circuits. A new dynamic threshold transistor structure has been proposed to improve performances of digital circuits. The proposed switched-capacitor dynamic threshold PMOS (SC-DTPMOS) scheme employs a capacitor along with an NMOS switch in order to effectively reduce the threshold voltage of ...

A novel and robust scheme for radix-4 Booth scheme implemented in Carbon Nanotube Field-Effect Transistor (CNTFET) technology has been presented in this paper. The main advantage of the proposed scheme is its improved speed performance compared with previous designs. With the help of modifications applied to the encoder section using Pass Transistor Logic (PTL), the corresponding capacitances o...

Bit swapping linear feedback shift register (BS-LFSR) is employed in a conventional linear feedback shirt register (LFSR) to reduce its power dissipation and enhance its performance. In this paper, an enhanced BS-LFSR for low power application is proposed. To achieve low power dissipation, the proposed BS-LFSR introduced the stacking technique to reduce leakage current. In addition, three diffe...

Single-electron transistor (SET) is a key element of current research area of nanotechnology which can offer low power consumption and high operating speed. Single electron transistor [SET] is a new nanoscaled switching device because single-electron transistor retains its scalability even on an atomic scale and besides this; it can control the motion of a single electron. The goal of this pape...

The thermal behavior of a power transistor mounted on a dissipator is considered in order to estimate the transistor temperature junction using a measure of the dissipator temperature only. The thermal transfers between the electric power applied to the transistor, the junction temperature, and the dissipator temperature are characterized by two fractional transfer functions. These models are t...

This paper describes a transistor sizing methodology for both analog and digital CMOS circuits. Various techniques are used for power optimization in CMOS VLSI circuits. Transistor sizing is one of the important techniques for the determination of circuit performance. The aim of the power optimization is to minimize the power and power-delay product or the energy consumption of the circuit. Thu...

In this paper, a novel low power pulsed flip-flop (PFF) using self-controllable pass transistor logic is presented. The pulse generation logic comprising of two transistor AND gate is used in the critical path of the design for improved speed and reduced complexity. In the D to Q path inverter is removed and the transistor is replaced with pass transistor logic. The pass transistor is driven by...

We propose and demonstrate both a binary and ternary adder circuit based on a resonant tunneling diode (RTD) and a bipolar transistor. The basic switching cell consists of an RTD in series with the base of a bipolar transistor. The RTD is used to set a threshold voltage for the switching of the transistor.