A behavioral testability analysis technique is proposed for early prediction of testability by analyzing behavioral specifications written in VHDL. The technique extracts functional properties by an analysis of variable range, statement hardness and dependency relation between variables of the specification. It predicts the testability for the whole design with a low computational cost. Another...

This paper describes a new approach to integrate testability consideration into high-level synthesis. The approach is based on an iterative technique for high-level synthesis which utilizes a sequence of design-improvement transformations to generate a register-transfer level design from a VHDL behavioral specification. A testability analysis algorithm is used to analyze the intermediate result...

The cost of the test activity constitutes an important part of the total development cost. To make test easier (cost, time, and efforts), the consideration of test problems before the implementation phase is now necessary. This early consideration is known as Design for testability (DFT). The design of testable software does not consist solely in applying methods that improve the testability bu...

This paper presents an efficient strategy for testability analysis and fault diagnosis of analog circuits using behavioral models. A key contribution is a new algorithm for determining analog testability. Experimentally, we determined the testability and faults of a fabricated 10 bit digital-to-analog converter modeled using the analog hardware description language, Cadence-AHDL. Also, we appli...

The development of PHM propels the combination of design for testability and relevant PHM technology, which leads a need for the demonstration of PHM-oriented testability design. The paper mainly introduces the evaluation and demonstration method ranging from the design phase to the demonstration phase. Firstly, the index set to be evaluated is established according to the feature of the PHM-or...

Testing is a crucial part of any software project. Its importance can be seen in the increasing amount of developer striving towards producing code with higher testability, thus being able to verify and validate the functionality of their systems. The design and structure of the code is thereby very important, to incorporate testability at a satisfying level. Dependency-Injection(DI) is a way o...

Improving testability during the early stages of High-Level Synthesis (HLS) has several benefits, including reduced test hardware overhead, reduced test costs, reduced design iteration, and significant improved fault coverage. In this paper, we present a novel register allocation method, which is based on weighted graph coloring algorithm, targeting testability improvement for digital circuits....

In this paper, we present a method for analyzing the testability of a circuit during the design process. Given a circuit specification, whatever the level of description from the behavioral level (initial specification) down to the Register Transfer Level (High Level Synthesis process result), the testability analysis returns values which represent the relative difficulty for computing input se...

Modular products and reconfigurable testing processes are crucial in modern manufacturing. This paper discusses the concept of product modularity, test modules of increased reusability and exchangeability, and some aspects of design for testability. A methodology for design of modular products for testability in the presence of testing modules is developed. An integrated approach to design of m...

The goal of the proposed research is to develop metrics for testability, test methods, tools and design rules for high testability in distributed real-time systems (DRTS). Theoretical and practical results with regard to testing and testability of distributed real-time systems are next to nonexistent. Research is therefore of significance to both academia and Industry. We propose here a project...