Digital sub-threshold circuits are significant for ultra-low power (ULP) applications. Operating circuits at ultra-low voltage levels leads to the less power per operation. An optimized method is separating the logic blocks based on performance requirement and utilizing multiple-supply voltage (VDD) for each blocks. In order to prevent an enormous static current in these multi-VDD circuits, vol...

Scaling the voltage to the sub-threshold region is a convincing technique to achieve low power in digital circuits. The problem is that process variability severely impacts the performance of circuits operating in the sub-threshold domain. In this paper, we evaluate the sub-threshold sizing methodology of [1,2] on 40 nm and 90 nm standard cell libraries. The concept of the proposed sizing metho...

While designing supporting and peripheral circuits like address decoders, sensing circuits, sensing amplifiers, pre charge and I/O control circuits are very important for the proper functioning of SRAM. BL and BL are the two access lines present in the SRAM memory cell which is accessed by the supporting circuits. Designing memory cell with low power consumption and high noise margin without co...

In Analog circuit design field, current reference circuit is mostly used for constant current supply to the circuits, so that their function runs properly. This work gives a circuit that operates with minimum operating voltage and current, CMOS current generator circuit and presents its performance with circuit simulation in 180nm UMC CMOS technology. The designed circuit has four sub parts sta...

In order to achieve a longer battery life suppression of energy consumption is vital. A demand for design methods for less energy consumption is increasing. The subthreshold scaling can reduce energy per cycle significantly by the scaling of supply voltage (VDD) below threshold voltage (Vth). Threshold voltage of CMOS technology represents the value of the gate-source voltage when the current i...

This paper proposes a low voltage CMOS Nano power current reference circuit and presents its performance with circuit simulation in 180nm UMC CMOS technology. The proposed circuit consists of start-up, Bias-voltage, currentsource sub-circuits with most of the MOSFETs operating in sub-threshold region. Simulation results shows that the circuit generates a stable reference current of 4-nA in supp...

This paper qualitatively explores the performance limits, i.e., energy vs. frequency, of adiabatic logic circuits based on nanoelectromechanical (NEM) switches. It is shown that the contact resistance and the electro-mechanical switching behavior of the NEM switches dictate the performance of such circuits. Simplified analytical expressions are derived based on a 1-dimensional reduced order mod...