This report presents the results of the Differential Fault Analysis (DFA) Project. The project was funded by Secure Business Austria (SBA) and A-SIT. Its objective was to perform basic steps in the field of fault injection. The effect of faults was investigated in theory as well as in practice. The first part of this report concentrates on theoretical fault models. New fault attacks on public k...

We discuss the nonabelian world-volume action which governs the dynamics of N coincident Dp-branes. In this theory, the branes’ transverse displacements are described by matrix-valued scalar fields, and so this is a natural physical framework for the appearance of noncommutative geometry. One example is the dielectric effect by which Dp-branes may be polarized into a noncommutative geometry by ...

11 Earthquakes can rupture geometrically complex fault systems by breaching fault step-overs. 12 Quantifying the likelihood of rupture jump across step-overs is important to evaluate earth13 quake hazard and to understand the interactions between dynamic rupture and fault growth 14 processes. Here we investigate the role of seismogenic depth and background stress on phys15 ical limits of earthq...

The diagnosis of Cyber-Physical Production Systems (CPPS) comprises two main steps: (i) The identification of anomalous system behavior und (ii) the deduction of the underlying root cause. While step (i) requires only models of the OKbehavior of the system, step (ii) requires models that can predict the system behavior in OK and especially in fault situations. Over the last years, the question ...

As can be seen in Figure 6.1, there is a stage called test development where it basically consists of three activities; test generation, fault simulation and design for testability implementation. Test generation is a method of generating an input sequence that can distinguish between good chip and defective chip when the input sequence (test sequence) is applied to the chip using a tester. Fau...

Fault equivalence is an essential concept in digital VLSI design with significance in many different areas such as diagnosis, diagnostic ATPG, testability analysis and synthesis. In this paper, an efficient procedure to compute exact fault equivalence classes of combinational circuits is described. The procedure consists of two steps. The first step performs structural fault collapsing and uses...