To address the problem of low trigger accuracy during resampling and variable sampling rate using a fixed analog-to-digital converter (ADC), this paper proposes an interpolation method combining sinc linear to improve accuracy, based on digital trigger. After behavior simulation verification actual field programmable gate array (FPGA) test verification, data collected by two 3GSps 12-bit ADCs w...

The spurious-free dynamic range (SFDR) of a MOSFET–C filter can be increased greatly by generating its tuning voltage with a charge pump. In this paper, we apply this technique to build a Sallen-and-Key lowpass filter with a pole frequency of 24 MHz and a pole Q of 3. It has an SFDR better than 50 dB and consumes 16 mW from a 3.3 V supply. Implemented with a doublepoly triple-metal 0.6m CMOS pr...

This paper presents a 24-bit 5.0 GHz ultrahigh-speed direct digital synthesizer (DDS) with direct digital modulation capabilities used in a pulse compression radar. This design represents the first DDS RFIC in over-GHz output frequency range with direct digital modulation capabilities. It adopts a ROM-less architecture and has the capabilities for direct digital frequency and phase modulation w...

To increase the productivity in various sectors, foundation can be made based on mobile communication solutions to different problems. SDR is the preferred technology to stitch together advanced services for ubiquitous global mobile connectivity. We have investigated in the present study the Sigma Delta ADC, one important component of SDR. Improvement in Dynamic Range including the SFDR with a ...

VLSI technology is to optimize the any type of digital architecture used to enhance the various applications. One of the mainobjectives is to reduce the glitch energy in various systems. The survey is to optimize glitch energy. Different techniques are used to improve the performance by reducing the glitch. Some of the parameters areSpurious Free Dynamic Range (SFDR), Along with Integral Non Li...

Analog-to-information converter (AIC) plays an important role in the compressed sensing system; it has the potential to significantly extend the capabilities of conventional analog-to-digital converter. This paper evaluates the impact of AIC nonlinearity on the dynamic performance in practical compressed sensing system, which included the nonlinearity introduced by quantization as well as the c...

In this paper, a novel design approach for a phase to sinusoid amplitude converter (PSAC) has been investigated. Two segments have been used to approximate the first sine quadrant. A first linear segment is used to fit the region near the zero point, while a second fourth-order parabolic segment is used to approximate the rest of the sine curve. The phase sample, where the polynomial changed, w...

This paper investigates how investment funds behave in line with European Union (EU)'s Sustainable Finance Disclosure Regulation (SFDR). The SFDR requires to take a clear position respect sustainability objectives, aiming at addressing the threats of greenwashing. However, we still do not know whether are managed accordingly. We frame our study within organizational category theory, using Morni...

High-linearity, low-noise DFB lasers are necessary for analog optical communications, including subcarrier multiplexed systems, wireless personal communication systems (PCS) service and phased array radar. In this thesis, we examine the dynamic range and distortion for a Fujitsu DFB laser. We extract parameters from the device and use these parameters to simulate the distortion characteristics....

We present a 10-bit 1-MS/s successive approximation analog-to-digital converter core including a charge redistribution digitalto-analog converter and a comparator. A new linearity calibration technique enables use of a nearly minimum capacitor limited by kT/C noise. The ADC core without digital control blocks has been fabricated in a 0.18μm CMOS process and consumes 118 μW at 1.8 V power supply...